SAN JOSE, Calif. – Extreme ultraviolet (EUV) lithography is in danger of missing a key milestone at Intel Corp.
At present, Intel plans to extend today’s 193-nm immersion lithography to the 14-nm logic node, which is due out in the second half of 2013. Then, the chip giant hopes to insert EUV for production at the 10-nm logic node, which is expected to appear in the second half of 2015.
Even though Intel’s 10-nm node is more than four years away, the company is currently hammering out the design rules for the process-and EUV is late for the party. ''EUV is late for (the) 10-nm design rule definition’’ stage at Intel, said Sam Sivakumar, director of lithography at Intel, during a presentation at LithoVision here on Sunday (Feb. 27). LithoVision was sponsored by Nikon Corp.
Still, Sivakumar said that EUV still stands a good chance of being inserted for the company’s 10-nm node-if production-worthy tools are shipped by the second half of 2012. Even then, EUV will be at the ''late end of the spectrum,’’ he told EE Times.
Intel is looking at two vendors for EUV tools: ASML Holding NV and Nikon. ASML is reportedly about to ship a ''pre-production'' EUV lithography tool to Intel. That tool from ASML is called the NXE:3100, which is using a light source from Cymer Inc.
For its part, Nikon has devised EUV alpha tools within its own headquarters in Japan and at Selete, an R&D organization. ASML and Nikon are reportedly supposed to ship full-blown production EUV tools this year or next.
Still, the clock is ticking for EUV. EUV is a next-generation lithography (NGL) technology that was supposed to be inserted for production at the 65-nm node. But the technology has been delayed, due to the lack of power sources, defect free masks, resists and metrology infrastructure.
Still, leading-edge chip makers are banking on EUV for production fabs, in an effort to avoid the dreaded and costly double-patterning era for optical lithography. But chip makers have no choice but to go to double patterning. Experts believe that EUV is now targeted for production at the 16-nm node-or later.
@MarkLapedus: I heard exactly the same statement at the SPIE Lithography show: at 14-nm, Intel will continue to use 193-nm immersion, plus a double-patterning with pitch splitting.
@unknown multiplier: I am with you on this; I remain skeptical about EUV by 2013. It may be delayed until 2015 or 2016.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.