SANTA CLARA, Calif.—Directed self-assembly (DSA)—a technology based on a concept that was virtually unknown outside of research labs a few years ago—has emerged as a legitimate contender for use in future semiconductor manufacturing.
"Directed self-assembly cannot be ignored," said Christopher Bencher, a member of the technical staff at Applied Materials Inc., at the SPIE Advanced Lithography conference here Tuesday (March 1). Bencher further suggested that DSA should be moved from the list of emerging lithography technologies to the "current" technologies list.
At SPIE, Bencher presented data on self-assembly patterning for cells with a half-pitch of less than 15-nm that was collected through a joint project with IBM Research. Bencher noted that while lithographers have been enthusiastic about DSA, the biggest concern has been defect density. Bencher said his project demonstrated the use of DSA to build 12-nm line/space structures across an entire 300-mm wafer with a very low rate of less than 1 percent of "dislocation" defects.
Hundreds of particle defects were also measured during the project, but, according to Bencher, particle defects introduced through the use of DSA are no different than particle defects encountered during the use of any new process technology material and will be reduced through better filtration in the fab. Bencher's project was concerned mainly with dislocation defects because, he said, this is a new type of defect inherent to DSA.
"This clearly puts us on a trajectory to make DSA feasible, with fairly good defect control," Bencher said.
In DSA, a block copolymer or polymer blend is deposited on a substrate, usually by spin coating, and subjected to an annealing process that "directs" it to form ordered structures. Researchers say DSA is compatible with conventional 193-nm lithography equipment and would eliminate the need for dual exposure steps.
DSA first landed on the International Technology Roadmap for Semiconductors (ITRS) as a potential solution for leading-edge, critical layer lithography in 2007 and remained part of 2009 ITRS. The technology is also considered complementary to next-generation lithography candidates such as extreme ultraviolet (EUV) lithography and nano-imprint lithography.
But even the most enthusiastic supporters of DSA acknowledge that the technology is years away from being used in CMOS production, even in a best case scenario. Defect density is only one of a number of technical hurdles DSA must overcome to be viable in volume production.
Yoshi Hishiro, director or R&D at materials supplier JSR Micro Inc., estimated that DSA was at least two to three years away from being used in niche CMOS production.
Attendees at SPIE are nervous about the prospects for EUV, long considered the front runner to replace optical lithography. Intel Corp. hopes to put EUV into production at the 10-nm node, but this week its lithography director said EUV is running late for 10-nm design rule definition. Development of power sources for EUV lithography tools remains behind schedule, and several SPIE attendees expressed concern that EUV was still dealing with "basic physics" issues.