LONDON – Toshiba Corp. has announced that it is introducing NAND flash memories made using a 24-nm process technology. The SmartNAND series integrates NAND flash memory with a control IC that supports error checking and correction (ECC) and is available in densities ranging from 4- to 64-Gbyte, according to Toshiba.
This is presumably in packages that contain multiple die as 64-Gbit (not byte) represents a benchmark of monolithic integration at the 2X-nm node.
SmartNAND is designed to remove the burden of ECC from the host processor. However, No mention was made by Toshiba of the read-write cycling endurance athough the company did say that managing bit errors is essential for digital products to maintain acceptable levels of performance and reliability.
The SmartNAND 24-nm products are replacements for current 32-nm generation devices. The integrated error correction (ECC) and leading edge 24nm process generation allows for enhanced speed performance of 1.9 times faster read speed and 1.5 times faster write speed than the current lineup. Toshiba's SmartNAND offers a range of read and write speeds to vary optimized speed performance; the read speed is available in four options and the write speed in two. Power save mode is also available for lower power requests.
The components have a standard NAND flash memory interface, 8-kbyte page size and come in 48-pin TSOP(12mm by 20mm by 1.2mm) and 52-land LGA (14mm by 18mm by 1.0mm) packages. Samples of the new SmartNAND family are available in mid-April and mass production will begin 2Q11 with some memories becoming available in 3Q11 and 4Q11.
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