SAN FRANCISCO - As expected, Intel Corp. Wednesday (May 4) rolled out its 22-nm process—with a twist.
The chip giant introduced the process, based on its long-awaited 3-D transistor design, dubbed tri-gate. First disclosed by Intel in 2002, the tri-gate transistor will form the basis of its 22-nm node. Intel also demonstrated the world's first 22-nm microprocessor, codenamed Ivy Bridge.
Ivy Bridge-based Core family processors will be the first high-volume chips to use tri-gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.
But missing from the announcement was a 22-nm mobile processor, which could fend off competitive threats from the ARM camp.
Intel's 22-nm process will also be based on Intel's third-generation high-k/metal-gate scheme. It will also use copper interconnects, strain silicon and other features. Like 32-nm, Intel will make use of 193-nm immersion lithography.
Intel did not disclose any details about the low-k interconnect technology. Intel insists that it will not use silicon-on-insulator (SOI) technology. SOI wafers will add about 10 percent to total process cost, according to Intel.
The tri-gate transistor represents a major shift in the IC industry. For decades, the industry has used the traditional "flat" two-dimensional planar gate. Intel seeks to replace the planar gate with a thin three-dimensional silicon fin that rises up vertically from the silicon substrate.
Other leading-edge chip makers are looking at multi-gate transistor structures, including IBM’s fab club, TSMC, among others. The tri-gate transistor technology is known outside Intel as a FinFET. One company, TSMC, plans to roll out its initial FinFETs at the 14-nm node.
In any case, Intel will have at least a ''three year lead’’ in the multi-gate transistor race, said Mark Bohr, an Intel senior fellow and director of process architecture and integration, at a press event here. Bohr said the tri-gate technology can scale to the 14-nm node, but he stopped short of talking about the next node after 22-nm.
The chip giant calls its technology a ''fully depleted tri-gate transistor. Tri-gate transistors form conducting channels on three sides of a vertical fin structure, providing 'fully depleted’ operation.''
"Control of current is accomplished by implementing a gate on each of the three sides of the fin—two on each side and one across the top—rather than just one on top, as is the case with the 2-D planar transistor," according to Intel. "The additional control enables as much transistor current flowing as possible when the transistor is in the 'on' state (for performance), and as close to zero as possible when it is in the 'off' state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance)."
The 22-nm tri-gate transistor provides up to 37 percent performance increase at low voltage versus Intel's 32-nm planar transistors, the company said. This gain means that they are ideal for use in small handheld devices, which operate using less energy to "switch" back and forth, according to the company. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32-nm chips.
To enable 22-nm, Intel must do a ''couple more’’ double patterning steps, Bohr said. But in all, the company will use standard fab tools in the technology and the process cost adder is
only 2 to 3 percent.
The 22-nm process is called 1270 and it is starting to ramp. First wafers will come out of D1D in Oregon and then volume production will start at F32 in Arizona in the latter half of this year, Intel said.
Intel, which last year surprised semiconductor industry observers by agreeing to serve as a foundry provider for programmable logic startup Achronix Semiconductor Corp., has apparently agreed to a similar arrangement with another up-and-coming programmable logic startup, Tabula Inc., according to reports. Intel has declined to comment on the Tabula reports, which a spokesperson termed a rumor.
Analysts had mixed feelings about Intel's 22-nm tri-gate announcement. ''The performance numbers are impressive,’’ according to analyst Doug Freedman of Gleacher & Co.
''This only adds 2-3 percent to finished wafer costs vs. planar technology (to produce the silicon 'fin' that creates a 3D transistor channel and gate, which provides better scaling factor than planar technology - likely more than offsetting the extra cost with die size benefits),'' he said. ''Tri-gate can be tuned to lower leakage (fully depleted transistors) or lower threshold voltage. The bottom line is this is much better for performance at low-power/low-voltage operation, as the shutdown process is key to total power consumption.''
Intel is targeting the first 22-nm product in the desktop/server space, but Freedman believes the chip giant should initially look at another segment . ‘’Why not the mobile first?’’ he asked.
Based on Intel's tri-gate announcement, I fear this is the end for AMD. How can they catch up? AMD's 32-nm processor is barely shipping. They have no CEO. The question is who will buy them? Right now, I believe AMD is on the block. Samsung might buy them. Or they could soon become Abu Micro Devices. I say the later. Thoughts?
If it were just Windows, then Intel wouldn't worry. The icing on the cake, for ARM, is that Visual Studio supports ARM cross-development on x86. Ironically, Intel's own high performance x86 processors are more than capable of real-time ARM emulation. Practically every ap for x86 Windows can very easily be ported to ARM Windows. Microsoft is leveling the playing field, which is a very smart move on MS part, but really puts the pressure on Intel. But Windows 8, in my opinion, will be much more taxing on the hardware than Android or iOS. Windows 8 may be much less responsive on ARM than on a 22 nm Sandy Bridge-like multi-core Atom.
yes, finfet has been there for 10+ years. The industry credits Profs. Chenming Hu (Cal) as the expert on this structure. There is, however, many challenges to make this work in real life (hundres millions transistor). For example, The gates on each side of the fin to match. consistant height of the Fin (extremely difficult), Width of the Fin, integration schemes (the fin tends to collapse and causing shorts). TSMC hired Hu as CTO and planned to introduce Finfet in 65nm, but after few years without progress, they eventually gave up, and Hu went back to teaching. What Intel achieved will be at least 2-3 ahead of the packs. Semiconductor process is not Magic, it's a lot of research, and learn from errors to get the result. When intel annound 1270 release, they'll have at least ran 10K+ wafers to learn the technology. With IBM/GF/Samsung/TSMC/UMC combined, their wafer with Finfet on it will be less than 200 pcs ... and that where the gap is
sxs537, I have to agree with you on the SoC ecosystem point. This truly has been ARM's advantage, more so than power efficiency. They have made it as painless as possible to build the chip -- assemble the cores and other IP -- and then to build a system (software, etc.) around the chip.
But with 22 nm being production-ready by the end of this year, Intel indeed has pushed their huge manufacturing advantage even further ahead of the pack.
They really should pursue foundry business more seriously. I think every SoC design team in the world would salivate at the idea of building their chip in an Intel fab.
There exists a book on multigate (trigate) transistors: "FinFETs and Other Multi-Gate Transistors", J.P. Colinge (Ed.), Springer, 350 pages, November 2007 (ISBN: 978-0-387-71751-7)
Trigate was invented in 1995:
"Quantum-wire effects in thin and narrow SOI MOSFETs", X. Baie, IEEE International SOI Conference, pp. 66-67, 1995
"A silicon-on-insulator quantum wire", X. Baie, Solid-State Electronics, Vol. 39, pp. 49-51, 1996
Intel's real threat is Microsoft's decision to offer Windows 8 on an Arm platform. They can respond to this in 3 ways:
1. Advance the x86 product such that Arm is an unattractive platform for Windows.
2. License Arm.
3. 1 & 2
Clearly #1 is the more profitable option. #2 is a good backup plan after making #1 a success. The tri-gate technology is a discontinuity in technology, design tools and design expertise. Intel will have a jump of several years just due to design tools and design expertise alone. They may have to concede some of the low-end mobile market but they are going to fight for the high-end performance market.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.