Over one billion Tensilica dataplane processor units (DPUs) have now been shipped and the company's licensees are currently shipping at a run rate exceeding 500 million DPUs per year.
Tensilica said it believes its customers will hit the two billion cumulative shipment mark by the end of 2012--a doubling in volume in 18 months.
DPUs from Tensilica combine the capabilities of DSPs and CPUs while delivering, according to the company, 10 to 100x the performance because they can be optimized using its automated design tools to meet specific signal processing performance targets.
They are used for the signal processing-intensive tasks such as audio, video, and communications in system-on-chip designs.
Jack Guedj, Tensilica's president and CEO, said, "We reached this milestone with virtually no unit shipments in LTE, where we have significant design wins that have yet to reach production."
The growth in unit shipments is a direct result of Tensilica's investments in standard cores for the high-volume mobile wireless and home entertainment markets combined with high-volume custom designs in the PC and video/imaging markets.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.