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Report: IBM, 3M to team on chip stacking

9/6/2011 11:39 PM EDT
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resistion
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re: Report: IBM, 3M to team on chip stacking
resistion   9/7/2011 7:55:45 AM
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You guys might want to take a look at this EETimes article from three years ago, before taking this announcement. http://www.eetimes.com/electronics-news/4077160/IBM-GIT-demo-3D-die-with-microchannel-cooling

mcgrathdylan
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re: Report: IBM, 3M to team on chip stacking
mcgrathdylan   9/7/2011 6:49:03 AM
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Indeed, another example of how duct tape remains the ultimate engineering tool. Comments about the need for more information to understand this are certainly understandable. The nitty gritty details remain sketchy at this point. Presumably we will find out at least a little bit more once IBM and 3M make the announcement (which the WSJ report indicates will happen this week).

seaEE
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re: Report: IBM, 3M to team on chip stacking
seaEE   9/7/2011 4:08:54 AM
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Double-sided sticky tape to the rescue once again! ;)

sureshtheory
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re: Report: IBM, 3M to team on chip stacking
sureshtheory   9/7/2011 3:53:51 AM
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Sure... need more info to understand this... if implemented what are advantages over 3D transistor implementation??

resistion
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re: Report: IBM, 3M to team on chip stacking
resistion   9/7/2011 3:36:42 AM
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Certainly, from server blade experience, we need to flow air or other fluid in between chip planes because stagnant medium will warm up which is inadequate for heat sinking. So I had thought they were heading in some microfluidic direction.

_hm
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re: Report: IBM, 3M to team on chip stacking
_hm   9/7/2011 2:18:11 AM
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Need more technical information to understand the concept.

greenpattern
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re: Report: IBM, 3M to team on chip stacking
greenpattern   9/7/2011 1:13:27 AM
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Many electrical engineers seem to have not passed thermodynamics. Heat conduction requires a temperature gradient. No such helpful gradient between stacked chips (especially in the middle).

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