SAN FRANCISCO—Brion Technologies, a division of Holland's ASMLHolding NV, announced Monday (Sept. 19) a new photomask correction capability for its Tachyon computational lithography platform.
Tachyon MB-SRAF (model-based sub-resolution assist features) enables the high-speed, full-chip processing of advanced chip designs with larger process windows, greater productivity, and lower development costs than rule-based alternatives, according to ASL (Veldhoven, the Netherlands). The application of SRAFs provides a larger process window, giving greater latitude in imaging and resulting in higher yielding devices, the firm said.
The traditional rule-based approach for SRAF placement and sizing is fast becoming prohibitively complex as devices scale to smaller process geometries, according to ASML. The adoption of freeform illumination enabled by ASML's FlexRay technology and Brion’s Tachyon SMO (source mask optimization) software further challenges the limitations of rule-based SRAF technology, according to ASML.
To realize the benefits in imaging made possible by the FlexRay illuminator, and at the same time make the solution robust against all pattern proximities and layout variations, there is an explosion in the necessary number of rules governing SRAF shape, size and placement, ASML said. Development times for rule-based SRAFs are thus increasing dramatically and require many iterations of mask tape-out and wafer print tests, the firm said.
Model-based SRAF techniques have been in development for some time but until now have not been used for full-chip applications due to heavy compute costs, poor quality of correction, and/or the extreme impact to mask costs from the pixelated geometries they generate, ASML said. Tachyon MB-SRAF has overcome these barriers and offers full design space coverage with embedded conflict resolution, mask rule check (MRC) compliance and SRAF printability prediction for full-chip implementation, according to ASML.
Compute times for Tachyon MB-SRAF have been substantially reduced to enable cost-effective full-chip processing, and are typically comparable with the corresponding OPC compute times on the same layer, ASML said.
"Freeform source mask optimization and full chip MB-SRAF are becoming essential for patterning 2-D layers in next generation processes at the 2x nm nodes and beyond," said Jim Koonmen, general manager of Brion, in a statement. "Our Tachyon MB-SRAF is the first in the industry that has been proven at multiple customer sites worldwide in both logic and memory full-chip applications. It delivers a cost effective solution and enables our customers to tape-out their advanced masks on time and with excellent results."