SAN FRANCISCO—EDA and IP vendor Synopsys Inc. Monday (Sept. 26) announced advances in its Galaxy implementation platform with the availability of its unified solution for mixed-signal designs.
The unified solution provides seamless integration between IC Compiler physical implementation and the Galaxy Custom Designer solution, allowing design teams to move between digital and custom implementation flows while maintaining design data integrity, Synopsys (Mountain View, Calif.) said. The unified solution accelerates the design development cycle by enabling custom edits to IC Compiler designs at any stage of development, including the time-critical tapeout phase, Synopsys said.
"To manage complexity and reduce the development times of our mixed-signal designs, we need a unified methodology for digital and analog implementation," said Didier-Jerome Martin, physical implementation manager at STMicroelectronics' microcontroller division.
Martin said using Synopsys' unified physical implementation on a 32-bit microcontroller design reduced cycle time by 25 percent from initial floorplanning to final tapeout, compared to the company's previous design flow.
Traditionally, digital place-and-route users have had to manually transfer their designs to a non-integrated custom editing tool to make analog-style changes. The unified IC Compiler and Custom Designer solution provides a capability to perform custom editing of IC Compiler designs throughout the physical implementation flow, including floorplanning, placement, clock tree synthesis, routing and chip finishing, Synopsys said.