SANTA CLARA, Calif.—The path is clear for continued semiconductor scaling using FinFETs for the next decade, down to the 7-nm node, according to Shang-Yi Chiang, senior vice president of R&D at foundry giant Taiwan Semiconductor Manufacturing Co.
Beyond 7-nm, the most pressing challenges to continued scaling will come from economics, not technology, Chiang said in a keynote address at the ARM TechCon event here Tuesday (Oct. 25).
Chiang (above) said he has faith that the semiconductor industry will solve technical hurdles associated with moving past 7-nm over the next decade, but acknowledged that the new technologies might make volume manufacturing of chips with critical dimensions smaller than 7-nm cost prohibitive.
"From node to node, we have found the wafer price has increased much more than previous nodes," Chiang said.
In another ARM TechCon keynote later, Chi-Ping Hsu (right), senior vice president of R&D at in EDA vendor Cadence Design Systems Inc.'s Silicon Realization Group, presented data on dramatic cost increases associated with moving from the 32/28-nm node to the 22/20-nm node. The amount of money invested by the semiconductor industry in process R&D, for instance, jumped from $1.2 billion at 32/28 to between $2.1 billion and $3 billion at 22/20, Hsu said. Design costs for a chip jump from $50 million to $90 million at 32-nm to $120 million to $500 million at 22-nm, Hsu said.
At the 32-nm node, a chip needs to sell about 30 to 40 million units to recoup the costs associated with it, Hsu said. At the 20-nm node, the "breakeven" point jumps to between 60 and 100 million units, Hsu said.
FinFETs are three-dimensional transistors in the early stages of being adopted by chip makers. Intel Corp., which refers to its 3-D transistor technology as "tri-gate," is expected to begin sampling 22-nm chips with 3-D transistors later this year.
Chiang said the 20-nm node will be the last generation at which the semiconductor industry can possibly use a planar transistor. "After that, it will run out of steam," Chiang said.
So will FinFETs revolutionize the tools industry as well. What will happen to conventional layout,schematic,spice tools. How different is FinFETs from the existing FET's and how will it affect the tool vendors ?
Intel has demonstrates 15 nm transistors in the lab several years ago. 7 nm is the width of the gate, not the channel. Even if it is for the channel, it is a three dimension thing, there are more than 1000 atoms for the cross-section.
Collaboration and competition are the yin and yang of R&D. The former conserves resources but suppresses true new innovation. The latter is where the (unforeseen) technology revolutions come from but can become prohibitively expensive and end up inhibiting new development by killing cross-hybridization of ideas between groups. Like biological evolution, it is a messy and nonlinear process.
At the 32-nm node, a chip needs to sell about 30 to 40 billion units to recoup the costs associated with it, Hsu said. At the 20-nm node, the "breakeven" point jumps to between 60 and 100 million units, Hsu said.
the 32-nm node--30 to 40 billion units
the 20-nm node--jumps to between 60 and 100 million units
billion & million units ,billion should be million? what's wrong here??
--EEtimes editor,please answer this question.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.