LONDON – Maria Marced, European president of foundry Taiwan Semiconductor Manufacturing Co. Ltd., has pushed back against claims by market researchers at Gartner Inc. that foundries are having problems with yield on 28-nm process technologies. For TSMC the roll out of the 28-nm chip manufacturing node is "on plan," Marced told EE Times.
Marced added that no sign had been seen of reducing demand at that node, something that Gartner said that foundries were seeing collectively. Marced re-iterated the claim made in May 2011, that the 28-nm node is ramping three times faster than the 40-nm node that preceded it.
TSMC is already in volume production at 28-nm with Altera Corp., Advanced Micro Devices Inc. (AMD), Nvidia Corp., Qualcomm Inc. and Xilinx Inc. and is reportedly running test wafers in an attempt to win Apple's A6 processor business away from Samsung Electronics Co. Ltd.
"28-nm will be 2 percent of revenue in Q4 and in the second half of 2012 it will be greater than 10 percent. 28-nm goes well with us," said Marced. "The current run rate of tape outs continues to be three times 40-nm," she said. The number of tape-outs "completed or very close to completed" is 40 while TSMC knows of a total of 89 28-nm chip design projects.
Not surprisingly Marced declined to talk about specific yield figures but said that gate-last HKMG had been shown to be the right choice. "40-nm was difficult, 28-nm is more difficult, 20-nm will be even more difficult, but early collaboration with the ecosystem makes these things possible." Marced added that with the move to 20-nm TSMC would have a competitive advantage over rival foundries as it would be on its second node with gate-last HKMG, while others would have had to switch from gate-first HKMG to gate-last.
"We believe innovation is the stimulus for the industry," Marced said.
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