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First 3-D IC spec set for release

12/16/2011 05:43 PM EST
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docdivakar
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re: First 3-D IC spec set for release
docdivakar   1/6/2012 3:29:26 PM
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The WideIO standard has been RELEASED! You can download it here free (registration required): http://www.jedec.org/standards-documents/results/jesd229 MP Divakar

docdivakar
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re: First 3-D IC spec set for release
docdivakar   1/5/2012 9:36:46 PM
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Thermal management will always be a challenge when the horizontal real estate is a premium and one is constrained by cost for adding solution in the vertical dimension! Dealing with thermal management is an application issue that the JEDEC standard recognizes but steers clear of making specific recommendations. It is up to the design teams. MP Divakar

docdivakar
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re: First 3-D IC spec set for release
docdivakar   1/5/2012 9:24:21 PM
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Sanjib, a good majority of the 3DIC using TSV's are & will be substrate-based packages, BGA being the most common. The biggest advantage of stacking using TSV's is by delivering much more functionality (not to mention the storage) in the same form factor. MP Divakar

docdivakar
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re: First 3-D IC spec set for release
docdivakar   1/5/2012 9:22:07 PM
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Perhaps the title should have reflected TSV-based 3D IC standard. You are right, 3DIC standards have been around a while now. Wirebonded memories have shipped in Billions! MP Divakar

docdivakar
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re: First 3-D IC spec set for release
docdivakar   1/5/2012 9:12:23 PM
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Well, packages have been growing in the 3-rd dimenions for several years now -incarnations like Package-on-Package (PoP) are shipping in millions of volumes. Amkor recently announced crossing 100Million PoPs. TSV's are one way to start stacking bare dice to realize a product. 3DIC stacked products look much like existing Semi packages while internally their construction will be a lot different. The interface defined by the JEDEC WideIO standard lets one create memory+controller product by stacking. It doesn't dictate the dia of TSV's but provides guidelines for locating interconnects between memory, logic and other functions via TSV's. I hope this helps. MP Divakar

Astronut0
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re: First 3-D IC spec set for release
Astronut0   12/20/2011 8:55:05 PM
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This is not the *first* 3D-IC standard! Look here: http://www.3d-ic.org/standards.html

Sanjib.A
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re: First 3-D IC spec set for release
Sanjib.A   12/20/2011 3:21:06 PM
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Is there any illustration showing what kind of packages would be used for the 3D ICs?

KHummler
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re: First 3-D IC spec set for release
KHummler   12/19/2011 2:26:50 PM
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Please note that SEMATECH is not a standards body. SEMATECH actively works to forge industry consensus (e.g. through our wiki site: wiki.sematech.org), but does not define or publish 3D standards.

Kinnar
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re: First 3-D IC spec set for release
Kinnar   12/19/2011 2:06:23 PM
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Does it mean that after the standardization of the 3D IC, memories packages will get converted in to cube forms instead of stripe packages? If the interface is planner as depicted in the figure, why it is called 3D IC?

docdivakar
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re: First 3-D IC spec set for release
docdivakar   12/17/2011 9:17:02 PM
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40um! Yes, you are correct, I had used the Word symbol font which got mangled it would appear!

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