Mike Bell, vice president and general manager of the Mobile Wireless Group at Intel, said the Penwell chip has better performance at the same power consumption as rival SoCs and in some cases can demonstrate better performance at lower power consumption. In a slide presentation the company claimed it has performance leadership at competitive smartphone power consumption levels but produced no quantitative data to support this. It did show itself to being not the best performing chip for a 720p video playback benchmark performing, but also claimed to be far from the worst.
The Medfield chip includes the single-core Saltwall, 512-kbytes of level-2 cache, the single-core SGX540 2-D/3-D graphics processor licensed from Imagination Technologies Group plc (Kings Langley, England) as well as blocks for high definition (1080p) multi-standard video encode/decode and separate programmable image signal processor. The graphics processor is clocked at 400-MHz.
High power consumption has been a criticism of Intel's SoC designs in the past and to save it Intel has added a raft of power management features.
The Penwell SoC has a dedicated 32-nm process and Intel has made design changes in the creation of Saltwell CPU core to support a lower than usual minimum voltage operation. It also has what it describes as an ultra-low power L2 cache. Intel did not give the low voltage figure now supported by Penwell.
The company has also specified numerous dynamic clock frequency stepping points to allow the voltage to be reduced and power saved. The CPU clock can be reduced from 1.6-GHz to 100-MHz. There is also a variety of standby modes with various standby power consumptions and resumption latencies.
Pennwell SoC power consumption*
Clk freq. Power
100-MHz ~ 50-mW
zero ~ 1 to 18-mW**
**CPU state preserved in SRAM with <100-microseconds exit latency
*Assuming junction temperature of 70C and steady state worst case application loading.
The Penwell SoC is designed to support an 8- to 24-megapixel primary camera as well as a secondary 2-megapixel camera. To aid catching the right shot the SoC also supports 10-frame burst-mode photography mode. That captures 10 full 8-megapixel pictures at 15 frames per second. Part of the support for this is in the image signal processing core which is believed to derive from the technology of Silicon Hive, acquired by Intel in February 2011. Silicon Hive had been licensing its technology to Intel for several years prior to the acquisition.
If you'll excuse me for being pedantic, repeating the same error over and over doesn't make it right :-)
Even if 'cash' and 'cache' are homophones where you come from, their etymology is completely different.
Some engineer in the past took the trouble to pick _exactly_ the right word for the job. That engineer may even have worked at Intel...
Well to have an idea how well Medfield would do in the market there needs to be some meaningful benchmarking.
According to reports, a tablet based on Medfield should do well at something called CaffeineMark, and outperform Tegra 2, Snapdragon MSM8260 and Samsung Exynos.
When it comes to stock values, the objective truth does not matter while perception is everything. So what is your perception of whether Intel's CES showing will hurt Qualcomm and others?
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.