LONDON – Graphics and video processing technology licensor Imagination Technologies Group plc (Kings Langley, England) has formally announced the first cores in its PowerVR Series 6 GPU core family.
Series 6 cores have been known to exist for some time being discussed by a number of companies under the code name Rogue. Imagination has now tipped details of the first two family members and a number of innovations that it claims allow Series 6 graphics cores to offer the lowest memory bandwidth and the best performance per square millimeter and per milliwatt. Innovations include compression to reduce bandwidth when moving data, and the addition of housekeeping processors and improved scheduling, that it is believed can help support GPU-compute applications.
Imagination has announced that the G6200 and G6400 GPU IP cores are the first in a family of PowerVR Series6 GPU cores and that is has eight licensees so far for Series 6 cores. Among the PowerVR Series6 partners announced so far are: ST-Ericsson, Texas Instruments, Renesas Electronics and MediaTek.
Based on a scalable number of compute clusters the PowerVR Rogue architecture is intended to range from mobile applications to the highest performance embedded graphics including smartphones, tablet and personal computers, games consoles, automotive, digital TV and more. Compute clusters are arrays of programmable computing elements that are designed to offer high performance and efficiency while minimizing power and data bandwidth requirements. The first PowerVR Series6 cores, the G6200 and G6400, have two and four compute clusters respectively.
PowerVR Series6 GPUs can deliver 20x or more of the performance of current generation GPU cores targeting comparable markets, Imagination said. This is enabled by an architecture that is around 5x more efficient than previous generations. PowerVR Series6 GPU cores are designed to offer computing performance exceeding 100-GFLOPS and reaching the teraflops range.
Technologies and features new in Series 6 include: compression, including lossless image and parameter compression and PVRTC texture compression. There is also an enhanced scheduling architecture. Dedicated housekeeping processors are included from Imagination's Meta line of multi-threading processors. Imagination has also updated its tile-based deferred rendering (TBDR) architecture.
"Based on our experience in shipping hundreds of millions of GPU cores, plus extensive market and customer feedback, we have been able to set a new standard in GPU architecture, particularly in the areas of power, bandwidth and efficiency - the key metrics by which GPUs are now judged," said Hossein Yassaie, CEO of Imagination, in statement.
All members of the Series6 family support all features of the latest graphics APIs including OpenGL ES 'Halti', OpenGL 3.x/4.x, OpenCL 1.x and DirectX10 with certain family members extending their capabilities to full WHQL-compliant DirectX11.1 functionality.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.