LONDON – Joel Monnier is a former vice president of central R&D at Europe's largest chip company STMicroelectronics. The company he now leads is Kalray SA, headquartered in Orsay near Paris, and with an engineering base in Grenoble, France. The company is on a mission to launch a relatively general-purpose many-core processor. Kalray is claiming it can combine the hardware with necessary software to break through the many-core barrier with a 256 processor array integrated on a 28-nm CMOS chip.
That chip was due in the fourth quarter of 2011, according to the company's website www.kalray.eu. It is not clear if that was achieved and the company has not responded a recent email request for information. The company was founded in July 2008 and has raised more than $20 million in venture capital.
Kalray has dubbed its approach MPPA for Multi Purpose Processor Array and claims that its architecture allows 256 processors, organized as 16 clusters of 16, to work in parallel and communicate via a network-on-chip just as clusters of computers do on the Internet. Kalray has chosen a proprietary VLIW [very long instruction word] architecture integrating a 32-bit/64-bit floating point calculation unit.
The chip is expected to deliver about 200-GOPS at 400-MHz clock frequency and a maximum performance of about 500-GOPS at power consumption of about 5 watts.
However, such specifications cannot be easy to achieve. Kalray not only has to build a many-core processor in a leading-edge process but also demonstrate ways to make writing software transparent and easy. and getting the code to run efficiently.
It is generally acknowledged that building many-core processors for well chosen applications, such as PicoChip's array for basestation protocol execution and NetLogic chips for networking is a tractable problem. However, making such an array that meets more general needs and which can power up and power down cores to deliver efficient processing for different types of application is notoriously difficult.
Plurality Ltd. (Netanya, Israel) announced its HyperCore acceleration processor IP in April 2010. This was also a 256-core processor albeit one aimed at wireless infrastructure applications.
According to its website Kalray is aiming its chip at a broader set of applications that can benefit from parallelization; imaging, telecommunications infrastructure, data security, network appliances and embedded applications.
A "general purpose" 5 watt 256 VLIW flow processor for "embedded applications" in the fields of "image processing, signal processing, control (??), communications and data security"?
Doesn't sound too general purpose to me. Am I missing something here?
In the least, the application needs to be amenable to flow processing. That's why there aren't any "general purpose" many-core flow-processors out there.
So what's the angle here?
"startup attempts many-core revolution"
i have to agree jayson, infact its already been done before a long time ago now April 4, 2006 in the so called Rapport Inc's "kilocore"
"Kilocore, from Rapport Inc. and IBM, is a high-performance, low-power multi-core microprocessor that has 1,025 cores. It contains a single PowerPC processing core, and 1,024 eight-bit Processing Elements running at 125 MHz each, which can be dynamically reconfigured, connected by a shared interconnect. It allows high performance parallel processing."
and OC lets not forget to give other credit wher eits due too, that being dave may (not related :) of XMOS many multicore fame.....
sure this France pretenders version is using more modern process and adds current busses etc but lets not forget the past and still living broard shoulders Joel Monnier is standing on...
Riddle: What do you call a beast configured like a kilocore only it's a MEGAcore?
A single Power PC processing core hooked up to an FPGA.
Which requires the hapless software programmer to also be a logic designer. Which degenerates to a situation where you have no software traction, and therefore no apps, and therefore no customers, and therefore no real product. Just a really cool idea that doesn't quite fly.
on a side note i really think its the right time for "kilocore" Michael O'Brien, tranputer/XMOS pioneer dave may, and ARM Inc to get together with some VC and make a mass produced ARM A15/ Mali T600 based Achronix FPGA on the 22nm or lower Intel Process ASAP ;)
Don't forget Martin Marietta with their Geometric Arithmetic Parallel Processor (GAPP) in 1988. A large circuit board held 32,000 processors as I recall. It supported a Single Instruction Multiple Processor (SIMP) approach. Great for working on images after the initial overhead of clocking in the data from an edge.
Plurality's HyperCore developed a many-core design not only for wireless inftastructure.
Although not successful yet in producing a maketable product, it proposed a holistic solution for programming model and hardware that programmers liked and silicon could handle.
I believe message passing for massively parallel machines is not usefull. Here is another one who tries.
Ultimately surely the general purpose model has to be similar to that used by multiple computing nodes hanging off the Internet, but writ small on a single die.
For now the likes of Intel and ARM want to keep everything coherent and synchronized but my instinct tells me that cant work as you go to scores of core except in certain very tightly controlled applications.