LONDON – Flash memory vendor SanDisk Corp. (Milpitas, Calif.) is looking for a director of processing engineering management for a 3-D resistive RAM team based in Milpitas, something initially reported by Bright Side of News. A job ad for the position was posted in SanDisk's website dated Feb. 15, 2012.
According to the posting, the individual will manage a team of about 30 engineers that is working to develop ReRAM switching material, a selector device and associated technology that can be manufactured with "acceptable 3-D product yield, reliability and performance."
The job is based at SanDisk headquarters in Milpitas, California, and the director's goal should be, the advert says, to bring the 3-D ReRAM technology from R&D to production. No time line is given in the advert for when production should be achieved.
Some of observers have stated that ReRAM may be introduced as a non-volatile memory technology as a replacement for NAND flash, which is thought to be close to the limit of planar scaling. However NAND flash could continue a form of scaling – and gain a temporary reprieve – by integrating multiple memory cells in the vertical dimension.
It would appear that SanDisk is looking to introduce ReRAM with a similar vertical, 3-D integration.
ReRAM research to date has usually been based on some form thin metal-oxide layer such as titanium-oxide although the device and material physics is often considered to be not yet fully understood or optimized.
To be in with a chance of getting the director job applicants are expected to have a second degree (MSc of PhD) and at least 15 years of relevant experience and 12 years of management experience. And they will need to be prepared to travel because the director will need work with SanDisk's partner Toshiba and be good at "co-developing technologies in actual fabs as well as with foundries in other countries."
There are also open positions at SanDisk for senior device engineers to develop and characterize flash and future memory technologies and a senior process integration engineer to define layout design rules for "various 3D NVM technology options." A lot of the jobs were posted mid-February suggesting a push is underway at SanDisk.
Other companies already some way down the road with ReRAM include Hewlett Packard working with Hynix Semiconductor Inc., Samsung Electronics Co. Ltd. and Elpida Memory Inc. Both Hynix and Elpida are expected to launch ReRAM chips in 2013.
Thanks for the link. On slides 176-178, they show 2014 for the last conventional NAND flash at 1Z nm (low teens), followed by 3D BICS NAND without EUV, possibly bridging to 3D ReRAM in the latter part of the decade. IMEC and Samsung have stated last year that the BICS architecture could carry over to ReRAM. BICS is more cost effective than the original concept of 3D R/W.
resistion, you are correct. Unfortunately, there is no transcript of their recent Analyst Day, but there is a recording, and there are slides. Look at Slides 9, 29, 33, and especially 177-80 here:
They also have a recording of the Analyst Day on their IR page.
This is the technology that they bought with Matrix quite a few years ago, and have continued to work on. And they will need EUV for it, that is perhaps the main thing that they are "tapping their toes" for, waiting impatiently for AMAT to get their act together.
A did, indeed, see the headline on the Bright Side of News story and I have updated my story with references.
Of course I went to SanDisk to get the details. Which I did by way of the job posting on the SanDisk website, as reported above.
It was a holiday in the U.S. so I was not surprised that the company did not respond to an email of inquiry I sent.
I'll echo the previous comments that actual investigative reporting and putting together the pieces to build a story rather than simply reprinting press releases is a great thing to see. A similar source of competitive intelligence is patent filings (even if it does take 18 months before they publish). It seems like a number of companies are getting interested in 3D (stacked) integrated circuits.
I appreciate way this article was created based on the news extracted from the job add. :-)
I think I also have similar questions/doubts in my mind as raised in the above comments. May be, more adds following on this same topic in near future would confirm something is really going on?
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.