SAN FRANCISCO—Applied Materials Inc. failed to lead semiconductor equipment vendors in sales in 2011 for the first in 20 years, as strong sales of lithography tools propelled Dutch lithography vendor ASML Holding NV into the top sport, according to market research firm VLSI Research Inc.
ASML (Veldhoven, the Netherlands) notched sales of $7.88 billion in 2011, up 32 percent from 2010, according to VLSI (Santa Clara, Calif.). Applied, which slipped to No. 2, posted equipment sales of $7.44 billion, up 2 percent from 2010.
Applied slipped from the top spot in chip equipment sales for the first time since 1991, despite two months of Varian Semiconductor Equipment Associates Inc. sales were added to Applied Materials revenues after the close of acquisition in November 2011. According to VLSI, lithography spending overwhelmed non-litho related equipment spending, causing the change in rankings
Overall, the top 15 equipment suppliers grew 13 percent in 2011, according to VLSI. The lithography equipment suppliers, ASML and Nikon, grew 27 percent combined, more than twice the industry growth rate, the firm said.
Japanese equipment suppliers also recorded higher than average growth rates, VLSI said. Advantest led growth of the Japanese suppliers by recording 28 percent sales increase in 2011, helped by the acquisition of Verigy Ltd. and strong SoC test equipment sales in North America, VLSI said.
VLSI said 2011 equipment spending was driven by aggressive capacity expansion in the foundry and logic sectors, mostly the result of increasing demand for mobile devices. Capacity expansions in memory sector were limited as strong pricing pressure reduced profitability for memory suppliers and their ability to expand, the firm said.
I don't think you understand how wavelength affects lithography... the manufacturers are currently at 193 in wavelength yet are patterning 28nm (and beyond) now you say 12.5nm (which is incorrect actually) will be one node? Once EUV is up and working it will literally be able to pattern all the way down to 1 (maybe beyond?)
i do not think that anyone can predict whether the technology will fail or succeed with full surety. For ASML, emersion bet succeeded but EUV has failed to deliver. Still, the industry hopes are riding on it fortunately or unfortunately.
I find it difficult to correlate the record sales of ASML with the dismal progress of EUV, by the correlation ASML should be at the bottom and not at the top. The success of ASML should be judged by the market captured by the emersion tools and one of a kind technology provider in the market.
There's a reason why ASML is basically the lone EUV tool vendor. I believe that Nikon had/has the ability to be at least a close follower to ASML in EUV litho. But I think that they foresaw that the significant investment required for EUV technology development would be difficult to recoup. It was a business decision. They didn't drink the EUV litho kool aid.
EUV litho isn’t the only path to higher chip performance. New materials (FD-SOI), new architectures (3D/TSV, FinFETs) not to mention advances on the EDA front all have the potential to drive higher levels of performance and lower costs or at least bend the cost curve. Each of these approaches have their own technical hurdles and cost issues, but is EUV really that far ahead of the pack and any more “real”? And as far as Moore’s Law is concerned, the huge costs associated with EUV at the production-level kills the whole cost-side of the Moore’s Law equation. If it becomes a one-node solution, then does it really make economic sense? I’d love to see an economic report on the projected payback period of EUV once all of the dev costs are calculated.
EUV litho is still a problem in my mind - and not a sure thing. At least not for vast majority of semi companies. Yes, my opinion does go against industry consensus that EUV is the default next gen litho technology, but as has been pointed out by others, it will likely not be ready until some sub 11 nm design node. At that point the current wavelength (12.5 nm) will render it a single node solution. So EUV needs to migrate to 6.7 nm wavelength soon. That puts even more pressure on the source and resist vendors who currently have most of their eggs in the 12.5 nm basket. Plus you still have the reticle fabrication and inspection issues and the over $100 million price per tool. I believe that the technical challenges are still great. They will eventually be overcome, but Moore's law will have been broken to bits by that time. So EUV will become a relatively niche technology for a handful of companies who have the need for very high volumes that they can sell with high cost margins.
That consensus may have been last year, when people were still sure about power throughput.
The 14 nm logic in 2013 and 10 nm logic in 2015 will happen without EUV for sure. And memory will also have to move on during this time without EUV. Not enough systems available for everybody.
They'll learn to live without it.
The consensus in our industry is that EUV will happen. The question is when and at what cost and throughput.
Quad patterning with immersion tools will probably continue till 11nm with double spacer patterning... EUV may have an opening after that, in combination with or in parallel to 3D-type scaling
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.