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Chip execs see 20 nm variants, 3-D ICs ahead

4/27/2012 04:43 AM EDT
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MarineDir
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re: Chip execs see 20 nm variants, 3-D ICs ahead
MarineDir   6/20/2012 2:55:34 AM
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While scaling down exponentially to smaller and smaller sizes is the goal for engineers, if it makes no financial sense to do so, businesses would not fund that kind of development. Innovation here depends a lot on the profitability of making smaller and smaller chips. No one would want to spend so much resources to make a smaller chip if it doesn't have potential to make more money for chip makers. Mary - http://www.jensenmarinedirect.com

Adele.Hars
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re: Chip execs see 20 nm variants, 3-D ICs ahead
Adele.Hars   5/2/2012 1:37:34 PM
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Rick, if you or anyone else wants to better understand fully depleted (FD) planar or FinFET (3D) SOI (all very different from the partially depleted SOI IBM et al have long been using for high perf), lots of good info at www.soiconsortium.org. Also recommend an excellent white paper there posted by ST explaining their choice of FD-SOI for 28nm SOCs. And ST-Ericsson's got a really interesting blog going on about it it (they tape out the new NovaThor smartphone SOC on 28nm FD-SOI in Q3) -- see http://blog.stericsson.com/blog/2012/04/st-ericsson-general/fd-soi-a-process-booster-for-st-ericssons-next-generation-novathor-part-1/ . He says that FD-SOI at nominal voltages gives similar peak performance to HP processes and more than 35% performance improvement compared to LP at same Vdd; and it does far better on leakage & variability. But I too would really like to hear more from anyone who was at the GSA Summit.

docdivakar
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re: Chip execs see 20 nm variants, 3-D ICs ahead
docdivakar   4/30/2012 9:27:36 PM
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@CamilleK: you should take up on Rick's suggestion and write on the SOI portion of the GSA Summit last week... I missed out much of the morning due to prior commitments. MP Divakar

docdivakar
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re: Chip execs see 20 nm variants, 3-D ICs ahead
docdivakar   4/30/2012 9:24:54 PM
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@rick.merritt: looks like you left before the GSA 3DIC Workgroup meeting that day where some interesting points were made (couple from myself!). While it is true that some companies (Samsung, Micron) are building 3DIC (TSV-enabled) memory products, the ecosystem challenge still remains as are the standards. There will be more discussions on these two at the upcoming GSA meetings. MP Divakar

rick merritt
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re: Chip execs see 20 nm variants, 3-D ICs ahead
rick merritt   4/29/2012 11:18:25 PM
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Adele: As noted below, if you or others have insights on SOI from the GSA event feel free to submit a guest opinion article to me or our Web editor Dylan McGrath--or post a few brief insights here.

rick merritt
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re: Chip execs see 20 nm variants, 3-D ICs ahead
rick merritt   4/29/2012 11:16:45 PM
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I do not have any notes on the SOI portions of the event, but I welcome anyone to submit a guest opinion article summarizing what they learned...or just post a few factoids here.

Dave.Dykstra
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re: Chip execs see 20 nm variants, 3-D ICs ahead
Dave.Dykstra   4/29/2012 4:26:23 AM
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Well, in any event, it is interesting to see where the industry may be going with 20-nm and 3-D and what they are currently thinking.

CamilleK
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re: Chip execs see 20 nm variants, 3-D ICs ahead
CamilleK   4/27/2012 10:06:19 PM
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I agree. I think this or a separate article needs to present the SOI portions of this GSA Silicon Summit. I did learn a lot about the merits of FD-SOI specially at low voltages. Items like ST is using this technology for 28 and 20nm were relevant. The numbers were actually impressive.

rick merritt
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re: Chip execs see 20 nm variants, 3-D ICs ahead
rick merritt   4/27/2012 5:25:24 PM
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Frankly, yes the event was something of an SOI love fest. But it's a topic that has been around for years and one I (also frankly) don't have much perspective on. So I focused on what seemed like the top issues I understand and are significant to a broad readership: The industry is moving to 3-D ICs, there is a debate about 20nm and the outlook for CMOS is hard but OK to 7 nm. I'll let those interested in marketing SOI take out ads ;-)

chrmjenkins
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re: Chip execs see 20 nm variants, 3-D ICs ahead
chrmjenkins   4/27/2012 3:37:18 PM
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I would think SOI is a given in many places. Leakage starts to dominate power at feature sizes that small.

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