PORTLAND, Ore.— The Interuniversity Microelectronics Centre (IMEC) will report next month on progress to make its memristor variation, called resistive-RAMs (RRAM), the dominate memory technology in four papers at the VLSI Symposia in Honolulu.
At the Symposia June 12 to 15, IMEC (Leuven, Belgium), which claims RRAM will be ready for reliable mass production below 20 nanometers, will describe its cross-bar architecture. IMEC claims the architecture is denser, faster and lower-power than flash, but suitable to replace any memory type, including DRAMs.
"HP is using the term memristor to describe a device which has certain I-V characteristics," said Malgorzata Jurczak, program manager memory devices at IMEC. "But such I-V characteristics are typical to any RRAM cell using oxygen vacancy migration in transition metal oxide."
HP is sandwiching titanium-oxides in its memristive crossbar arrays, but at VLSI Symposia IMEC will describe using hafnium-oxide and other formulations for its RRAMs. In addition, there are two different ways of performing the resistive switching, using interfacial modification where oxygen vacancies are migrated either towards or away from the interface, thus modulating the tunneling barrier between the electrode and the conductive part of the oxide. Alternatively, filamentary switching aligns the oxygen vacancies in a conduction path which can be ruptured or established by oxygen vacancy migration. Either way, the advantage is the same—ultra-high density cross-bar arrays that use programming voltages to migrate oxygen vacancies, thereby changing the resistance of the bit-cell in a non-volatile manner.
"HP is claiming to using interfacial type of switching," said Jurczak. "But in our papers we are using filamentary switching."
IMEC will report that it has achieved ultra-fast sub-nanosecond programming times and ultra-low power sub-500 nanoamp operating currents using filamentary switching. IMEC will also report improved bit-cell reliability by virtue of its sophisticated materials stack engineering.
"We are overcoming the scaling limitations of conventional flash memory cells," said Jurczak. "Major memory players joined our research program on emerging memory technologies, proving the value of our RRAM research to the global industry."
Summary titles of IMEC's four papers are: "Dynamic ‘Hour Glass’ Model for Set and Reset in Hafnium Oxide RRAM," "Ultralow sub-500nA Operating Current in High-Performance Bipolar RRAM Achieved Through Understanding-Based Stack-Engineering," "Process-Improved RRAM Cell Performance and Reliability and Paving the Way for Manufacturability and Scalability for High Density Memory Application," and "Field-Driven Ultrafast sub-ns RRAM Programming."
IMEC's resistive random access memory (RRAM) sandwiches hafnium-oxide memristive material between metal electrodes.
Are the RRAM and memristor the same device? I don't think there is consensus yet. Just because Chua and HP say so, only makes them a vocal minority at this point.
RRAM performance metrics generally do not necesarily follow memristor behavior, so that's why we haven't see much overlap in the literature.
@resistion, that would appear to be an important distinction. How can anyone make an optimized device if we don't have a good understanding of the underlying physics? Are HPs interfacial memristor and IMECs filamentary RRAM really two sides of the same coin?
IMEC is a minor player in ReRAM. They have only one relevant US patent covering a form of ReRAM based on NiO(US7960775). Even this patent has questionable validity in view of earlier patents from Sharp and Samsung which teach graded oxide forms of ReRAM.
Calling ReRAM a memristor is good for getting press attention but as far as I know provides no useful information to help manufacture ReRAM devices.
I compiled some comparative patent data related to memory resistor patents at the following link:
The common element between memristors and RRAM is that they require no transistors in their bit cells--just the resistive material--thus allowing much smaller bits by virtue of using ultra-high density passive crossbars.
This is not generally true. There are several examples in the patent literature of using selection transistors in RRAM memory cells. The "memristor" is good for propaganda but does not explain anything about the physics of ReRAM despite the BS of Stan Williams and Leon Chua.
Thank you for citing examples of RRAM architectures that use transistors. The RRAM designers mentioned in my article are using pure crossbars without transistors in order to attain the highest possible densities.
Crossbar architectures have a notorious "sneak path" problem requiring non-linear elements such as diodes which creates manufacturing and power issues.
The first ReRAM products will more likely use 1T1R memory cells to avoid sneak paths. In fact Panasonic has just released the first ReRAM evaluation kit based on a 1T1R memory cell using tantalum oxide as the memory resistor.
Yes, there are many proposed solutions to sneak-path current, such as back-to-back zeners, which If nothing else it will make it an interesting race, since Hynix with HP, Elpida with Sharp, and Panasonic are all citing 2013 as debut dates, with others destined to jump in soon!
I'm think the idea that Leon Chua invented the memristor is incorrect. He didn't invent anything, he discovered a natural relationship between circuit variables. So his discovery is comparable to a physicist discovering a natural law. You wouldn't say Sir Issac Newton invented gravity. Now Stan Williams and HP labs on the other hand invented the first physical realization of a memristor as we know.
In think your are right. Chua's real contribution was to circuit theory, where he postulated that there "must be" a fourth type of passive electronic component--after resistors, capacitors and inductors. Williams then discovered such a memristive material. Others chip-makers were also experimenting with similar materials, but did not recognize that they had been predicted by Chua. In fact, Williams invited Chua to speak at HP about his memristor prediction first, then only later did Williams tell Chua that HP had a material that fit the bill.
Chua's idea of a "fourth fundamental circuit element" is incorrect. Dynamic generalizations of memory capacitors and memory inductors are also possible. Memory resistors should be considered as dynamic generalizations of resistors just as diodes are nonlinear generalizations of resistors.
In fact it is easy to show that the "pinched hysteresis curve" that Chua and Williams considers as evidence of memristors can be reproduced by a linear resistor in parallel with a nonlinear capacitor (see link below). Thus the "fourth element" claim lacks merit.
It is not opinion it is logic. Chua and HP/Williams both have incentive based on financial motivations and reputation to continue this "fourth element" argument but it has no merit when analyzed objectively. I have no incentive to disagee with Chua and HP if they were right. In fact I was an early supporter of the memristor hype and was invited to speak at the first memristor and memristive systems symposium at UC Berkeley alongside Williams and Chua and at 2 IEEE conferences (ISCAS 2010, ICECS 2010). Even strong supporters of the memristor such as Pershin and DiVentra have rejected the "fourth element" interpretation in favor of generalized memristor, memcapacitor and meminductor models.
In any case I am several decades younger than Williams and Chua and I can guarantee you I will have a hand in writing the history of the memristor long after Williams and Chua are dead. History will not be kind to them.
I noticed you made the exact same mistake again on your blog stating that Chua "invented" the memristor.
By the way silica-based memory resistors were known since the 1960's and Dow Corning did work on them in the early 1990's (see US Patent 5283545). But hey don't worry about trying to get the facts right I'm sure historians will sort it all out.
Blaise "Mouttet is hired by firms seeking to invalidate patents," according to Paul Marks at New Scientist:
Good for you. You know how to search Google. I also used to work for the USPTO during which time I helped organize the US patent classification for nanotechnology. I also have consulted with several industry researchers on ReRAM which is one of the reasons I know what a crap job internet reporters are doing with the "memristor" story.
Maybe you can try to use those keen investigative skills to fact check the "memristor" or ReRAM articles you write rather than issue press releases for corporations and academics which appear to be propaganda for HP rather than news articles. Better yet you should try contacting some of the researchers from Samsung, Sharp, Panasonic, Micron Technology, Unity Semiconductor, or one of the many other companies who are developing ReRAM to try to get a more balanced perspective on the relevance of Chua's "memristor" to ReRAM research.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.