PORTLAND, Ore.— The Interuniversity Microelectronics Centre (IMEC) will report next month on progress to make its memristor variation, called resistive-RAMs (RRAM), the dominate memory technology in four papers at the VLSI Symposia in Honolulu.
At the Symposia June 12 to 15, IMEC (Leuven, Belgium), which claims RRAM will be ready for reliable mass production below 20 nanometers, will describe its cross-bar architecture. IMEC claims the architecture is denser, faster and lower-power than flash, but suitable to replace any memory type, including DRAMs.
"HP is using the term memristor to describe a device which has certain I-V characteristics," said Malgorzata Jurczak, program manager memory devices at IMEC. "But such I-V characteristics are typical to any RRAM cell using oxygen vacancy migration in transition metal oxide."
HP is sandwiching titanium-oxides in its memristive crossbar arrays, but at VLSI Symposia IMEC will describe using hafnium-oxide and other formulations for its RRAMs. In addition, there are two different ways of performing the resistive switching, using interfacial modification where oxygen vacancies are migrated either towards or away from the interface, thus modulating the tunneling barrier between the electrode and the conductive part of the oxide. Alternatively, filamentary switching aligns the oxygen vacancies in a conduction path which can be ruptured or established by oxygen vacancy migration. Either way, the advantage is the same—ultra-high density cross-bar arrays that use programming voltages to migrate oxygen vacancies, thereby changing the resistance of the bit-cell in a non-volatile manner.
"HP is claiming to using interfacial type of switching," said Jurczak. "But in our papers we are using filamentary switching."
IMEC will report that it has achieved ultra-fast sub-nanosecond programming times and ultra-low power sub-500 nanoamp operating currents using filamentary switching. IMEC will also report improved bit-cell reliability by virtue of its sophisticated materials stack engineering.
"We are overcoming the scaling limitations of conventional flash memory cells," said Jurczak. "Major memory players joined our research program on emerging memory technologies, proving the value of our RRAM research to the global industry."
Summary titles of IMEC's four papers are: "Dynamic ‘Hour Glass’ Model for Set and Reset in Hafnium Oxide RRAM," "Ultralow sub-500nA Operating Current in High-Performance Bipolar RRAM Achieved Through Understanding-Based Stack-Engineering," "Process-Improved RRAM Cell Performance and Reliability and Paving the Way for Manufacturability and Scalability for High Density Memory Application," and "Field-Driven Ultrafast sub-ns RRAM Programming."
IMEC's resistive random access memory (RRAM) sandwiches hafnium-oxide memristive material between metal electrodes.
Crossbar architectures have a notorious "sneak path" problem requiring non-linear elements such as diodes which creates manufacturing and power issues.
The first ReRAM products will more likely use 1T1R memory cells to avoid sneak paths. In fact Panasonic has just released the first ReRAM evaluation kit based on a 1T1R memory cell using tantalum oxide as the memory resistor.
Thank you for citing examples of RRAM architectures that use transistors. The RRAM designers mentioned in my article are using pure crossbars without transistors in order to attain the highest possible densities.
This is not generally true. There are several examples in the patent literature of using selection transistors in RRAM memory cells. The "memristor" is good for propaganda but does not explain anything about the physics of ReRAM despite the BS of Stan Williams and Leon Chua.
The common element between memristors and RRAM is that they require no transistors in their bit cells--just the resistive material--thus allowing much smaller bits by virtue of using ultra-high density passive crossbars.
IMEC is a minor player in ReRAM. They have only one relevant US patent covering a form of ReRAM based on NiO(US7960775). Even this patent has questionable validity in view of earlier patents from Sharp and Samsung which teach graded oxide forms of ReRAM.
Calling ReRAM a memristor is good for getting press attention but as far as I know provides no useful information to help manufacture ReRAM devices.
I compiled some comparative patent data related to memory resistor patents at the following link:
@resistion, that would appear to be an important distinction. How can anyone make an optimized device if we don't have a good understanding of the underlying physics? Are HPs interfacial memristor and IMECs filamentary RRAM really two sides of the same coin?
Are the RRAM and memristor the same device? I don't think there is consensus yet. Just because Chua and HP say so, only makes them a vocal minority at this point.
RRAM performance metrics generally do not necesarily follow memristor behavior, so that's why we haven't see much overlap in the literature.