Breaking News
News & Analysis

Startup preps phased array satellite system

6/13/2012 03:18 PM EDT
2 comments
NO RATINGS
More Related Links
View Comments: Newest First | Oldest First | Threaded View
MeirG
User Rank
Rookie
re: Startup preps phased array satellite system
MeirG   6/14/2012 10:24:36 AM
NO RATINGS
The processing needed is essentially FFT. Many IP cores exists for this, either for a custom IC or an FPGA, which are equipped with lots of Multiply-Accumulate (MAC) building blocks.

DrFPGA
User Rank
Blogger
re: Startup preps phased array satellite system
DrFPGA   6/13/2012 8:56:59 PM
NO RATINGS
It would be interesting to know if any FPGAs are being used for some of the complex processing required for this application. The FPGA companies make it sound like this is an ideal application for their DSP blocks. What is under the hood?

Most Recent Comments
Ian Johns
 
Rainerh_#1
 
David Ashton
 
antedeluvian
 
Rainerh_#1
 
antedeluvian
 
David Ashton
 
betajet
 
David Ashton
Most Recent Messages
9/17/2014
9:24:21 PM
Top Comments of the Week
August Cartoon Caption Winner!
August Cartoon Caption Winner!
"All the King's horses and all the KIng's men gave up on Humpty, so they handed the problem off to Engineering."
5 comments
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Radio
LATEST ARCHIVED BROADCAST
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.
Flash Poll