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ARM, TSMC lead Intel in SoC, says CEO East

7/26/2012 11:44 AM EDT
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Adele.Hars
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re: ARM, TSMC lead Intel in SoC, says CEO East
Adele.Hars   8/13/2012 3:21:43 PM
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At the end of this article, Peter notes, "ARM processor cores are also supported on a 28-nm fully depleted SOI (FDSOI) process developed by STMicroelectronics NV and being transferred to foundry GlobalFoundries Inc. (Milpitas, Calif.) that is expected to subsequently shrink to 20-nm." There was some dicussion in the comments here re: multiVT. Thought you might be interested to know what ST has to say about that for its new 28nm FD-SOI ARM-based SOCs:"Planar FD technology allows several methods for setting the threshold voltage VT, including engineering the gate stack work function, trimming the gate length and other process engineering techniques. Thanks to this, STMicroelectronics’ 28FDSOI technology is capable of offering 3 VTs (HVT, RVT, LVT), as in traditional bulk CMOS technologies." (see http://www.advancedsubstratenews.com/2012/04/st-white-paper-excerpts-planar-fully-depleted-silicon-technology-to-design-competitive-soc-at-28nm-and-beyond/) Also, for a succinct summary of Prof. Fossum's view on SOI for FinFETs (from a few yrs ago, but I believe still valid), see his ASN article http://www.advancedsubstratenews.com/2007/05/a-perspective-on-multi-gate-mosfets/. He concludes:"...the underlying BOX effectively suppresses the source-drain leakage current under the gated fin-body (see the figure). Bulk Si would require heavy doping to suppress this current, as well as to effect reasonable device isolation. But one of our goals with MuGFETs [note: FinFETs are part of the multigate/MuGFET family] is to get away from doping and the random effects it causes: the only pragmatic way to do that is to put the UTB [ultrathin body] FinFET on SOI."

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