LONDON – Taiwan's United Microelectronics Corp. (UMC), which has been a struggling number two behind foundry leader Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), could get one over on its long-time rival by being first in production with FinFET process technology.
This is despite the fact that TSMC (Hsinchu, Taiwan) was one of the originators of the FinFET idea more than a decade ago.
UMC (Hsinchu, Taiwan), courtesy of a licensing deal with computing giant IBM, could be in production with a 20-nm FinFET process as soon as in the second-half of 2014; up to a year ahead of the latest disclosed timing from TSMC.
The process UMC has licensed is for FinFETs on bulk silicon rather than on silicon-on-insulator wafers, according to a spokesperson. This makes it easier to introduce quickly after a running a 20-nm bulk CMOS process. Reports suggest that making sure fins are well defined with a rectangular cross section can make a marked difference to performance and that making FinFETs on SOI wafers could produce a further improvement in leakage current performance.
Shih-Wei Sun, CEO of UMC did not demur when it was put to him that UMC was targeting 2014 for the introduction of 20-nm FinFETs, in a conference call to discuss UMC's second quarter financial results.
He added that UMC's first FinFET would be based on the same 20-nm back-end process as a 20-nm planar CMOS. He said most companies were doing this but that some were defining it as a 16- or 14-nm process. He added that this was really a marketing definition. This is in line with an explanation of a two-step 20-nm process given to analysts recently by Eric Meurice, CEO of lithography equipment vendor ASML.
The latest from TSMC is that its first FinFET process will be at 16-nm and that it is due to ramp in the second half of 2015. Although if TSMC is also using its 20-nm back-end for its FinFET process it may have the option to bring forward its timetable for a FinFET process.
Tech cannot be fully developed yet, as IBM or its JDA partners aren't introducing it at 20nm. So more development would definitely be needed. However IBM JDA partners have been co-developing tech for many generations including ST, GF, & Samsung, so I am not too worried for IBM technology
TSMC refers to their first FinFET process as 16-nm.......but ASML and UMC have both said that regardless of that these initial foundry FinFET processes are called they will be the application of FinFET front-end processing to the same back-end interconnect used at 20-nm
Lithographically, foundry's 28 nm should be close to Intel's 22 nm at about 45 nm half-pitch.
But the fin process adds extra cost without helping transistor density. I'd be curious if foundry 28 nm transistors perform so poorly against Intel's 22 nm FinFET.
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