LONDON – Singaporean chip packaging and test company STATS ChipPAC Ltd. has announced it has "qualified" 300-mm mid- and back-end manufacturing using a through-silicon-via (TSV) process allowing it to increase its 2.5- and 3-D packaging integration.
STATS ChipPAC said it is working with multiple customers on TSV particularly in the mobile, wireless and networking market segments. The company's current 3-D TSV qualification includes 28-nm silicon optimized for the wide I/O memory interface.
STATS ChipPAC already offers 2.5- and 3-D TSV back-end of line (BEOL) integration based on 200-mm wafers. Since April 2011 the company has been developing mid-end of line (MEOL) for 300-mm wafers.
"We now have mid-end manufacturing capacity in place in Singapore and are actively engaged with multiple strategic customers on the production qualification of 2.5D and 3D packaging designs," said Han Byung Joon, CTO of STATS ChipPAC, in a statement.
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