LONDON – Kalray SA, the well-supported French launching a parallel processing chip and software, has 25 customers and is hopeful of winning more in Germany and Japan, according to CEO Joel Monnier.
Monnier told EE Times that the 28-nm MPPA-256 processor from Kalray (Orsay, France), with its 16 clusters of 16 VLIW processors on-chip, is well-suited to imaging applications such as graphics computation and image recognition and is also being used as a platform for video compression and transcoding.
High Efficiency Video Coding (HEVC) is a video standard, currently being developed by a joint team between MPEG and VCEG. The finalized HEVC standard is expected to bring 50 percent bitrate savings compared to equivalent H.264/AVC encodings. HEVC should be ready for ratification by ISO and ITU as H.265 by the end of January 2013.
For broadcast applications algorithms such advanced codings are typically done on FPGAs but Monnier said that MPPA-256 processor die size is smaller than leading FPGAs and more power efficient for such tasks. "We also have a very good position in augmented reality," said Monnier, who prior to serving Kalray was corporate vice president at STMicroelectronics NV in charge of R&D from 1989 to 2004.
Joel Monnier, CEO of Kalray SA
Kalray has just announced that it can supply samples of the 28-nm MPPA-256 processor and Monnier said that the chips would be in use by customers before the end of the year. "We have 25 customers developing applications based on Kalray. This is mainly in Europe because of close relationships in France. We have good prospects in Japan and we want to be in the United States in the first quarter of 2013."
Other applications include signal processing of various types, including military tasks, data security support and scientific applications. Other applications such as EDA software acceleration are under discussion, Monnier said.