LONDON – A presentation at the upcoming ARM TechCon exhibition and conference taking place Oct. 30 to Nov. 1 in Santa Clara, Calif., is set to discuss so-called "big-little" processing as a power-saving method and the first processors that use it.
The big-little approach was first discussed by ARM in 2011 during the announcement of the Cortex-A7 processor core. That method pairs a high-performance processor core with a power-efficiency tuned processor core that can share processing duties in a cache-coherent combination. the result is an overall power-saving advantage. The Cortex-A15 and Cortex-A7 were introduced as the first big-little pairing that might use this technique with the forecast that chips including such pairings would appear in 2013.
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Brian Jeff, a product manager at ARM, is set to discuss the method and
the first processors that implement it in a 50-minute presentation at
10:30am on Thursday (Nov. 1).
According to the presentation abstract the first devices employing the big-little design style have arrived in silicon, which means that the presentation can report measured power savings and performance capabilities of big-little systems during such applications as web browsing, gaming, and background mobile phone and tablet computer activity. The presentation also set to discuss new CPUs on the ARM roadmap that will support the big-little approach.
Of course this begs questions as to which of ARM's many chip vendor partners has developed the first big-little processors, who has manufactured them and in what manufacturing process technology, and what smartphone and tablet computer platforms – virtual or otherwise – they are powering. Jeff may reveal some if not all of these answers in his talk. However, it is often the case that such performance data is revealed in a normalized manner and attributed to companies anonymously out of deference to commercial interests.
ARM TechCon, due to take place October 30 to November 1 at the Santa Clara Convention Center, is organized by UBM Electronics, the publisher of EE Times.
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