LONDON – STMicroelectronics has selected Samsung's foundry business unit for the production of ICs using a 32/28-nm high-K metal gate manufacturing process.
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The deal provides ST with alternative supply of 28-nm silicon. In the past ST has worked with Taiwan Semiconductor Manufacturing Co. Ltd. in the past as a supplier of leading-edge chips but during 2012 the Taiwanese foundry has been unable to meet the demand for 28-nm CMOS from its customers leading a number of them to announce plans to find other sources of silicon.
ST is also a manufacturer of leading-edge chips itself. ST has opted to manufacture circuits using a fully-depleted silicon-on-insulator (FDSOI) process for leading-edge chips it makes at 28- and going on to 20-nm. It remains unclear is whether the deal with Samsung has any implications about ST's commitment to the FDSOI process it has chosen to pioneer itself.
ST has been working with Samsung's foundry for some time and the relationship has already produced tape-outs of a dozen system-on-chip devices for mobile, consumer and networking applications. Tape-out represents the completion of the design phase although it can take several months for a chip to pass through manufacturing and be approved for sale.
"We have successfully started production of STMicroelectronics' new-generation 32/28nm SoC products," said Kwang-Hyun Kim, executive vice president with Samsung's foundry business unit, in a statement. "A foundry relationship with ST demonstrates our commitment to advanced process technology and our 32/28nm HKMG process-technology leadership. We have aggressively ramped 32/28nm capacity and will continue to deliver the most advanced process solutions to our customers."
"In addition to delivering waves of innovative new products, another key to ST's success in each of our target markets is working with industry leaders," said Jean-Marc Chery, chief-technology officer for STMicroelectronics, in the same statement. He added that ST and Samsung had worked together on process development in a body called the International Semiconductor Development Alliance.
I believe there are two challenges to be faced: a. Effective and efficient FDSOI wafer supply. 160K/month would be not enough in production phase.
b.$500 per wafer is too expensive to be adopted. For production, $250-300 would be affordable target.