For example, SRAM cells won’t get a full 50 percent shrink at 14 nm
without EUV, Ronse said. That’s because multiple patterning has some
limits in how closely it can place features.
“They can only catch
up if EUV becomes available,” Ronse said. “There [are] lot[s] of resources
going into development of light sources, so there is definitely a way to
get there, but it’s hard to estimate if it will be in two years,” he
Intel and TSMC recently committed billions of dollars to ASML (Eindhoven, Netherlands) which is developing the EUV systems.
also recently said it expects to make 14-nm chips next year and could
make 10-nm processors in 2015 using existing immersion lithography.
Without EUV, Intel believes it will have to write as many as five
immersion patterns on a chip which will take more time and money but is
IMEC now gets more than 60 percent of
production time with its ASML NXE 3100 EUV system installed here. “We
had quite some bumpy behavior in the first six months with average up
time declining from 50 to 10 percent,” due to problems with an older
light source, he said.
In its trials, IMEC has achieved device
resolution down to 16-nm half pitch with EUV. “EUV is most likely not
going to be used for all layers [in a chip], but for some critical
layers and will have to be aligned well for immersion,” said Ronse.
is also a problem. To date, IMEC has achieved alignment within 6 nm of
EUV and immersion layers on a chip. It needs to get down to alignment
within 2 to 3 nm, he said.
Airplanes developed at an astonishing rate 1900-1960s. Then 1960s-2012 we pretty much have the same technology in the air.
I see the same thing happening with the semiconductor industry. EUV or Ebeam will be in operation for decades without dramatic improvement in resolution or throughput. The semiconductor industry will not be the highest tech during this future era.
EUV is the most expensive to develop, so it requires industrial consortia or collaborations to be able to channel (i.e., waste) this level of spending. I am sure the next thing they will think of is to abandon 13.5 nm and work on the next wavelength 6.7 nm.
You are quite correct, IMHO. EUV would be last on any reasonable scale (had not so many careers not been invested in it) , but DSA wouldn't even be on the scale. Multibeam (a.k.a. e-beam direct write) has been around in various incarnations for decades and always ends up not on silicon, but on masks, where it belongs. Problem is no one will invest solely in mask writers, a tiny, yet demanding market. So, inventors in the direct write space always sell investors on silicon and are invariably disappointed.
DSA is a another pipedream, the latest shiny penny in a 2 decade search for a replacement for optical when it runs out of gas, which presumably was 2 decades ago. It is yet another screaming example of "nice from far but far from nice". Everyone one of these "solutions" had an Achilles Heel(s) of either source, mask or resist. This includes EUV, a.k.a. soft x-ray projection lithography. Meanwhile, it looks like imprint is indeed on Toshiba's roadmap for nonvolatile memory. Why? Because imprint uses commercial resists, masks, and sources, is cheap, and must only reduce defects.
I agree with Litho Lady. DSA has made interesting progress and nanoimprint is actually selling multiple tools!
Blog Doing Math in FPGAs Tom Burke 14 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...