Design Con 2015
Breaking News
News & Analysis

Moore's Law threatened by lithography woes

Scaling slowed
10/5/2012 01:26 PM EDT
41 comments
NO RATINGS
< Previous Page 2 / 2
View Comments: Threaded | Newest First | Oldest First
resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/5/2012 2:43:05 PM
NO RATINGS
Something they should have known. So much more energy absorbed from a shorter wavelength photon into a smaller space, obviously higher energy density needs to be dissipated into a larger volume to avoid unwanted material changes. In one form or another, multiple patterning becomes necessary.

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/5/2012 3:51:36 PM
NO RATINGS
Indeed, the well-known much higher absorption of EUV should have been a key clue.

krisi
User Rank
CEO
re: Moore's Law threatened by lithography woes
krisi   10/5/2012 3:18:05 PM
NO RATINGS
This has been known for years @resistion...I attended IEDM conference 20 years ago where this issue was discussed ;-)...talks about slowing of the Murphy's law started shortly after "the law" was established...I remember limits at 1 micron level considered insurmountable ;-)...but it might be true this time around...litho is clearly a huge challenge...but not the only one...Kris

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/5/2012 3:46:10 PM
NO RATINGS
Wow, that's quite a while back, if I read those papers, maybe I would have reconsidered joining this field, who knows ;-) I guess saying scaling won't happen would be much riskier than saying a particular way of scaling won't happen.

krisi
User Rank
CEO
re: Moore's Law threatened by lithography woes
krisi   10/5/2012 3:58:28 PM
NO RATINGS
If you were starting today there will be probably no point in joining silicon industry...by the time you were to reach 40 it would had become something different ;-)

Kresearch
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Kresearch   10/5/2012 9:15:19 PM
NO RATINGS
"Without EUV, Intel believes it will have to write as many as five immersion patterns on a chip which will take more time and money but is still economical." Hope it is true. But when litho rework rate boomed with strigent process requirements in triple and above patterning, process window and yield are impaced severely. It will be hard to see economic advantages in dimension shrinking. It is happening in current 22/20nm processes(double pattern) and getting worse for 14nm and beyond. That is the reason why Intel/Samsung/TSMC(even nVidia) are urging 450mm progress in parallel to lower down process cost. Tons of hurdles ahead, Go engineers.

PV-Geek
User Rank
Rookie
re: Moore's Law threatened by lithography woes
PV-Geek   10/5/2012 10:26:44 PM
NO RATINGS
The EDA enablement of multi-patterning provides a path to maintain a path along Moore's law. The only hesitation has been cost. But what most people are ignoring is the fact that by the time they get an EUV system capable of the numbers they need it will probably cost more than multi-patterning with traditional steppers, and it may even need multi-patterning itself.

krisi
User Rank
CEO
re: Moore's Law threatened by lithography woes
krisi   10/5/2012 10:32:07 PM
NO RATINGS
would it not be better to make a larger step and go to directed self-assembly (DSA)? multi-patterning feels very incremental with some gains due to smaller feature size and some losses due to lower throughput

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/6/2012 12:37:44 AM
NO RATINGS
I've seen DSA demos of 12-13 nm which are promising, but is it naturally a one-node formulation?

Kresearch
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Kresearch   10/6/2012 1:45:09 AM
NO RATINGS
DSA is promising but a long road to become production worthy. It becomes more sensitive in Photoresist thickness, temperature and chemical variations. It usually is treated as alternative if EUV or multi patterning fails to meet market requirements.

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/5/2012 11:15:19 PM
NO RATINGS
The dimensional scaling is clearly reaching demising return and escalating challenges. The NV NAND vendor have recognized it and are shifting to monolithic 3D (see Blog piece by Israel Beinglass http://www.monolithic3d.com/2/post/2012/10/3d-nand-opens-the-door-for-monolithic-3d.html) The logic vendor would sooner or later recognize it too (especially as the would need to carry the burden all by themselves)- the future of scaling is up - monolithic 3D

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/6/2012 12:42:51 AM
NO RATINGS
Basically, vertical scaling after horizontal scaling has stopped. But sequential patterning throughput, electrical and thermal considerations still limit vertical scaling.

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/6/2012 2:57:31 AM
NO RATINGS
Monolithic 3D is by far the best way to keep on integration while not increasing the overall power consumption. As for heat removal/thermal consideration, it is not much different than dimensional scaling as the monolithic scaling utilize very thin layers. In fact a detail paper on this issue resulted of a joint work with research group at Stanford university will be presented in the coming IEDM 2012

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/6/2012 4:32:35 PM
NO RATINGS
Well it looks like even 11 nm by currently demonstrated EUV or DSA would require double patterning support. So what design rule to base the 3d on?

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/6/2012 5:56:13 PM
NO RATINGS
The advantage of monolithic 3D scaling that we could apply it to an older process yet achieve better benefits than the next node of dimensional scaling. I would expect that the 28nm or 20nm would be a good node to apply monolithic 3D as an alternative to 14nm or 10nm

jeffreyrdiamond
User Rank
Rookie
re: Moore's Law threatened by lithography woes
jeffreyrdiamond   10/8/2012 4:23:57 PM
NO RATINGS
Isn't monolithic 3D really just an area bump, with some plusses and some minuses? You could in principle also just make chips physically larger in 2-D. A 3-D chip with 2 physical layers is not easier to make than double patterning 1 physical layers, is it? Seems quite similar to a multichip module. My impression is most applications are after higher nodes not because they desperately need more than 10 billion transistors, but that they need better device parameters or cost per transistor.

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/7/2012 3:44:17 AM
NO RATINGS
With either litho or 3D pushing for thinner layers, the increasing dissipation of resistance and risk of crosstalk should be pushing back.

swu3
User Rank
Rookie
re: Moore's Law threatened by lithography woes
swu3   10/7/2012 5:55:18 PM
NO RATINGS
Lithography will be a fundamental limiter for all companies. It will many it hard for any single company to have even a 1 generation technology lead.

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/8/2012 4:21:58 AM
NO RATINGS
Lithography is clearly a challenge (and not the only one)and at least it seems that it will need more time.Monolithic 3D with thin layers is an excellent path to continue Moore's Law. There are area that would need engineering such as heat removal and crosstalk but there are no "Red Brick Wall". And as the NAND vendors already adapting monolithic 3D for future scaling, there will be less vendors to support the escalating costs of dimensional scaling for lithography, transistors development etc.

Youself
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Youself   10/8/2012 5:02:25 PM
NO RATINGS
May be so, but I've been hearing about the demise of Moore's Law for literally decades now. And in a few months we'll hear how the industry managed to get past the current hurdles. Repeat, rinse.

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/8/2012 6:01:08 PM
NO RATINGS
Yes, I agree. Moore's Law is on going and if you look to the original Moore forecast (1965) it is about: " the number of transistors on integrated circuits doubles approximately every two years". Moore attribute it to three trends: Decrease dimension, larger die and improving the architecture. Monolithic 3D is part of the last two. We wrote more about in in our Blog (http://www.monolithic3d.com/2/post/2011/03/guest-contribution-entanglement-squared-by-zvi-or-bach.html)

WaywardGeek
User Rank
Rookie
re: Moore's Law threatened by lithography woes
WaywardGeek   10/8/2012 9:55:03 PM
NO RATINGS
Just to clarify, Moore's Law was originally: "The complexity for minimum component costs has increased at a rate of roughly a factor of two per year... Certainly over the short term this rate can be expected to continue, if not to increase." Stacking die can increase the number of components, but without any significant cost savings I'm aware of. That's not what Moore meant. Moore's Law has been breaking down now for a decade, in that people like you and me, and practically every other engineer out there, no longer have any meaningful chance of developing a new state of the art chip in the latest process. Only a few remaining giant corporations can afford it, and they apply their fab technology to fewer and fewer high volume chips. The innovation that made Silicon Valley great is no longer being applied to the latest and greatest silicon. In 1988, I laughed at the 1.5 micron three-metal NMOS process used at HP, because everyone was on 1 micron CMOS by then. Anyone even one process node behind was literally a joke. Now days, there are many times more .35 micron tape outs than 28nm. I'm sorry, but Moore's Law is a corpse that is just still twitching... EUV, unless some fundamental breakthroughs magically appear, will not save Moore's Law. That said, 3D stacking is cool, and I hope it works out as you envision. There is enormous value in being smaller, if not cheaper.

Or_Bach
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Or_Bach   10/9/2012 3:14:20 AM
NO RATINGS
I strongly agree with your last statement and in fact the strongest value of integrated circuit is being integrated. Integrated function in one device instead of connecting many devices over PC board represent about an order of magnitude improvement in power performance and cost. An important differentiation to be made is between 3D IC using TSV vs. monolithic 3D. While the cost of devices using TSV is not lower but in fact higher the monolithic 3D IC provide cost reduction as we detailed in our Blog (http://www.monolithic3d.com/2/post/2012/06/is-the-cost-reduction-associated-with-scaling-over.html)

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/9/2012 1:18:35 PM
NO RATINGS
" The group also called for development of 500-1,000W EUV light sources by 2016." With the known low efficiency of EUV light generation, I expect each tool to come with its own MW generator!

unknown multiplier
User Rank
Rookie
re: Moore's Law threatened by lithography woes
unknown multiplier   10/10/2012 5:37:34 AM
NO RATINGS
It gets worse when dose has to double every successive generation to combat shot noise.

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/10/2012 3:02:26 PM
NO RATINGS
I'm sure Moore's Law was not supposed to mean doubling EUV power every two to three years.

krisi
User Rank
CEO
re: Moore's Law threatened by lithography woes
krisi   10/9/2012 3:11:39 PM
NO RATINGS
Interesting points in the context of Moore's law vs 3D implementation...as Or-Bach pointed out the only contender to extend the Moore's law is monolithic integration, using TSV will never be cheaper

Litho Lady
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Litho Lady   10/10/2012 1:59:07 PM
NO RATINGS
.

Litho Lady
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Litho Lady   10/10/2012 2:05:55 PM
NO RATINGS
Why does industry rely on just EUV? What about DSA, NIL, multibeem, other? EUV is in last place.

Diogenes53
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Diogenes53   10/15/2012 12:04:32 AM
NO RATINGS
You are quite correct, IMHO. EUV would be last on any reasonable scale (had not so many careers not been invested in it) , but DSA wouldn't even be on the scale. Multibeam (a.k.a. e-beam direct write) has been around in various incarnations for decades and always ends up not on silicon, but on masks, where it belongs. Problem is no one will invest solely in mask writers, a tiny, yet demanding market. So, inventors in the direct write space always sell investors on silicon and are invariably disappointed.

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/15/2012 5:15:28 AM
NO RATINGS
EUV is the most expensive to develop, so it requires industrial consortia or collaborations to be able to channel (i.e., waste) this level of spending. I am sure the next thing they will think of is to abandon 13.5 nm and work on the next wavelength 6.7 nm.

John Verhaverbeke
User Rank
Rookie
re: Moore's Law threatened by lithography woes
John Verhaverbeke   10/10/2012 3:43:10 PM
NO RATINGS
I agree with Litho Lady. DSA has made interesting progress and nanoimprint is actually selling multiple tools! http://www.perssupport.nl/apssite/persberichten/full/2012/09/24/Molecular+Imprints+Receives+Multiple+Unit+Purchase+Order+To+Provide+Advanced+Lithography+Equipment+For+High+Volume+Semiconductor+Manufacturing

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/10/2012 4:57:20 PM
NO RATINGS
It's interesting..I heard they even had a 450 mm version out. But can the imprint templates even be inspected properly at this point?

krisi
User Rank
CEO
re: Moore's Law threatened by lithography woes
krisi   10/10/2012 3:48:50 PM
NO RATINGS
I wondered about DSA earlier...many people say it is not production ready yet...thank you for sending the link John, production worthiness is here!

Kresearch
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Kresearch   10/14/2012 11:24:20 PM
NO RATINGS
Who plans DSA or imprint in their Litho Roadmap? Intel? No. tsmc? No. Samsung? No. IBM Alliance? No? SEMATECH? Use it as bridge tool to wait EUV readiness. So?

Diogenes53
User Rank
Rookie
re: Moore's Law threatened by lithography woes
Diogenes53   10/14/2012 11:57:37 PM
NO RATINGS
DSA is a another pipedream, the latest shiny penny in a 2 decade search for a replacement for optical when it runs out of gas, which presumably was 2 decades ago. It is yet another screaming example of "nice from far but far from nice". Everyone one of these "solutions" had an Achilles Heel(s) of either source, mask or resist. This includes EUV, a.k.a. soft x-ray projection lithography. Meanwhile, it looks like imprint is indeed on Toshiba's roadmap for nonvolatile memory. Why? Because imprint uses commercial resists, masks, and sources, is cheap, and must only reduce defects.

resistion
User Rank
CEO
re: Moore's Law threatened by lithography woes
resistion   10/15/2012 5:06:22 AM
NO RATINGS
I can imagine imprint for HDD patterned media but not for Toshiba's NVM, mainly because they had been promoting the BICS approach for 3D NAND, which would avoid shrinking linewidths.

de_la_rosa
User Rank
Rookie
re: Moore's Law threatened by lithography woes
de_la_rosa   10/20/2012 9:01:06 PM
NO RATINGS
Airplanes developed at an astonishing rate 1900-1960s. Then 1960s-2012 we pretty much have the same technology in the air. I see the same thing happening with the semiconductor industry. EUV or Ebeam will be in operation for decades without dramatic improvement in resolution or throughput. The semiconductor industry will not be the highest tech during this future era.

Radio
NEXT UPCOMING BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll