“We need more programmable networks and high level APIs for them—we
should have done this years ago and companies such as Cisco and Juniper
will all do this,” Bechtolsheim told a gathering of engineers outside
the ballroom. “But that’s not OpenFlow, which is a protocol for a much
lower level of the network,” he said.
OpenFlow emerged from an
initiative at Stanford Unversity to define a ground-up way to simplify
large networks by running more of the work as applications on servers.
Google described its work creating an internal OpenFlow network at a
“Google’s talk was at an OpenFlow event but it was
not about OpenFlow,” said Bechtolsheim,. “now founder and chairman of
switch maker Arista Networks. “We support [OpenFlow] because we had a
customer who wanted to try it, but no one is really using it,” he said.
also took a swipe at competitors such as Cisco Systems who develop
their own ASICs and custom chips. Arista uses only merchant silicon in
“Cisco still believes they can win the war by
designing their own proprietary chips and they have the volume to do
it,” said Bechtolsheim after his talk. “But it still sounds like the old
Sparc arguments to me,” he said, referring to CPUs developed by Sun
Microsystems which he co-founded.
ASICs cannot achieve the
density and clock rates of full custom designs, he said. He predicted
merchant 28-nm switch chips will be available by 2015 that support up to
256 10G ports and 100G line rates.
“Merchant silicon market will
gain market share,” he said. “The next two iterations [of switch chips]
will see very rapid improvements in cost and performance."
What's Andy smoking these days? Apple would counter his merchant silicon argument and who's developing full custom chips these days except Intel and AMD. Most merchant silicon in networking are developed using standard cell ASIC libraries.
He's got his head in the clouds these days. Arista will get absorbed into some other networking company if they keep reselling Intel reference designs. Using merchant silicon is good if you want to get to market quickly but you can't hold your lead relying on suppliers. All your competitors have access to the same silicon.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.