IBM acknowledges that there are practical challenges for carbon nanotubes to become a commercial technology, including the purity and placement of devices. Carbon nanotubes naturally come as a mix of metallic and semiconducting species and need to be placed perfectly on the wafer surface to make electronic circuits, IBM said.
Device operation requires complete removal of the metallic nantobues to prevent errors in circuits, IBM said. For large scale integration to happen, it is critical to be able to control the alignment and the location of carbon nanotube devices on a substrate, IBM said.
To overcome these barriers, IBM researchers developed a method based on ion-exchange chemistry that allows precise and controlled placement of aligned carbon nanotubes on a substrate at a high density, enabling the controlled placement of individual nanotubes with a density of about a billion per square centimeter, IBM said.
The process involves mixing carbon nanotubes with a surfactant—a kind of soap that makes them soluble in water. A substrate comprised of two oxides with trenches made of chemically-modified hafnium oxide and silicon oxide is immersed in the carbon nanotube solution and the nanotubes attach via a chemical bond to the hafnium oxide regions while the rest of the surface remains clean, IBM said.
Single-atom sheets of carbon roll up to form carbon nanotubes--10,000 times smaller than a single strand of hair--that can be used as transistors on a chip.
Silicon transistors scaling is widely believed to be approaching its physical limitations. Their increasingly small dimensions—approaching the nanoscale—are expected to prohibit future gains in performance to the nature of silicon and the laws of physics. Within a few generations, it is believed, classical scaling of silicon transistors will run out of steam.
Carbon nanotubes are single atomic sheets of carbon rolled up into a tube. The carbon nanotube forms the core of a transistor device that could work in a fashion similar to the current silicon transistor, but with better performance, according to IBM. Earlier this year, IBM researchers demonstrated carbon nanotube transistors can operate as excellent switches at molecular dimensions of less than ten nanometers—the equivalent to 10,000 times thinner than a strand of human hair and less than half the size of the leading silicon technology.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.