SANTA CLARA, Calif. Ė Processor IP licensor ARM disclosed details on Tuesday (Oct. 30) of its next generation of big-little processors that support 64-bit processing and addressing. The Cortex-A53 and -A57 processors are aimed at 20-nm implementation.
Simon Segars, ARM's executive vice president and general manager of the processor and physical IP divisions, provided the details during a keynote talk at the ARM TechCon conference and exhibition here. More details about the micro-architecture of the two chips are expected later in the conference, which was organized by UBM Electronics, the publisher of EE Times.
Segars also announced six partners working with ARM on Cortex-A50-series processors but did not identify which partners are working on A57, A53 or future processor cores. The partners are: AMD, Broadcom, Calxeda, HiSilicon, Samsung and STMicroelectronics. They are expected to ship Cortex-A50 series-based chips in 2014.
The A57 and A53 processors support the ARMv8 64-bit instruction set and are intended to be used in both mobile and enterprise applications. The A57 and A53 were previously codenamed Atlas and Apollo, respectively.
As a big-little combination the processor cores are expected to be used in future "superphones" as well as in some server applications. The big-little approach leverages core pairs optimized for both performance and power efficiency and allows the cores to shift the processing load. The approach can produce more power efficient processing while delivering peak performance.
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ARM's Simon Segars describes the future of computing, from enterprise to mobile, during ARM TechCon.
However, the A53 "little" processor on its own can provide enough performance for entry-level smartphones while also being used in multiprocessing configurations, said Peter Greenhalgh, lead architect on the A50-series processors.
The A57 and A53 processors will target multi-GHz performance for advanced CMOS and FinFET processes technologies, which are supported by the early availability of ARM Artisan Physical IP and ARM optimization packages for core-hardening acceleration.
The Cortex-A57 is expected to provide about three times the performance of current superphone platforms in 32-bit mode, Greenhalgh and Segars said. The A57 also is being touted as providing five times the power efficiency for future tablets and notebooks, taking into account the benefits of process node scaling. It also features enhanced floating-point performance, ARM said.