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ISSCC preview: Revving ReRAMS, boosting memory bandwidth

11/19/2012 02:05 PM EST
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resistion
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re: ISSCC preview: Revving ReRAMS, boosting memory bandwidth
resistion   3/14/2013 4:20:20 PM
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It's always been a fundamental question, in a multi-layered memory, with the peripheral portion taking up more and more area, perhaps even initially exceeding the array area, doesn't the cost/bit reduction from additional layers quickly reach its limit, making it questionable to say it extends scalability?

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