Separately, an OpenFlow working group aims to develop a new layer of
software to map its central controller protocol to the ASICs used in
today’s routers and switches. The group has agreed on an approach but is
expected to receive multiple competing proposals on how to implement it
from Broadcom and others.
The so-called Forwarding Abstractions
Working Group will define a set of “table typing patterns” to let an
OpenFlow controller communicate at run-time what sorts of actions it
wants from a router or switch. The group will also create an example set
of the table patterns, said Curt Beckmann, a principal architect at
Brocade who chairs the group.
“We agree with the philosophy,
what’s still up in the air are the specifics of these tables, how they
line up with actions and rules and how many tables there are,” said Das.
“It should be amenable to existing switches rather than require people
to buy new ones,” he said.
Broadcom does “not have a finished proposal [for the tables], but we are soliciting feedback on one,” he added.
Well, who's boat would get rocked the most if there are any changes to the status quo? The biggest silicon provider in this field!
I cannot imagine that SDN which promises to make the hardware simpler and a commodity and instead push all the value into software is welcome by the incumbent silicon vendors.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.