LONDON – Foundry Taiwan Semiconductor Manufacturing Co. Ltd. has held a groundbreaking ceremony for a fab module at its Fab 14 gigafab at the South Taiwan Science Park in Tainan, Taiwan. The phase-six module is expected to be TSMC's first fab to mass produce 16-nm FinFET circuits in 2014.
Building of the sixth-phase module is being commenced only seven months after TSMC (Hsinchu, Taiwan) broke ground on phase-five.
Building work for phase six of the Fab 14 gigafab is not due to start until 2013 as part of a $17 billion capacity expansion scheduled for the next five years, according to a Taipei Times report.
"The factory will be the world's first 12-inch factory producing 20-nanometer system-on-chips and the first 16-nanometer FinFET chip manufacturing site for TSMC," the report quoted TSMC co-chief operating officer Chiang Shang-yi, as saying.
Fab 14 phases 5 and 6 are expected to approximately double the manufacturing capacity of the first four phases by offering a total cleanroom area of 87,000 square meters – equivalent to more than 11 soccer fields and four times larger than a typical 300-mm fab.
Today Intel is the only one in high volume manufacturing on 22nm FinFETs for almost a year now. No planer Bulk 22/20nm is manufactured yet. TSMC’s gigafab will produce its first 20nm SOC chips on Bulk in 2013 and first 16nm FinFETs in 2014. These are very ambitious schedule because the Bulk 20nm is not manufactured yet manly because it is very difficult to suppress the transistor leakage current or short channel effect. TSMC has not mentioned how to cope with the leakage current. TSMC may be better off if FinFETs were implemented in 20nm instead of adopting the Bulk 22nm because implementation of FinFETs on 20nm node will be relatively easier than on 16nm node. Furthermore, the learning from 20nm FinFETs technology processing will help enormously development of 16/14nm FinFETs technology.
As read from news, Apple is adopting TSMC 20nm SOC now. But I believe it is hard for 20nm ramp and bet node roll-back to 28nm later next year. Besides, based on tsmc's conference call data, there would be ~70K per month capacity by end of this year. I guess,it would reach 100~120K/month by mid-2013. At that time,600k/year capacity won't be concern but over-capacity from foundries would be a trouble.
I think confirmed few sources Apple skipping TSMC 28nm.
Reason, TSMC 28nm offers no speed improvement when porting Samsung 32nm A6/A6X to TSMC 28HPM and TSMC die cost is higher.
32 to 28 is less than a 1/2 node shrink and much less due to TSMC manufacturing circuit layout rules being less compact since high k is polished on gate last flow at TSMC.
Apple looked at TSMC 28nm last year and dropped project after taping out SOC.
Plus, if apple moving to TSMC 28nm, TSMC not installing enough 28nm capacity. Apple would need 600K 300mm wafers on yearly run rate
I would say 20nm SOC from Global Foundries or TSMC would be a temporary node in 1~2 years. When so call 14nm/16nm FINFET ready in 2014, all designers will switch to it due to power concern. So do Foundries. The difference between 20nm SOC and 14/16nm FINFET is in FEOL FINFET process only. Efforts in capacity switch would be not many.
INTEL's 14nm FinFET delay gives foundries time to catch up technology lag. Besides, started from 22nm or 20nm, process variation is too large to be well controlled as before. A wild guess, I would say Apple might start using TSMC's capacity from 28nm and skip 20nm node by mid 2013.
Word in Taiwan, 20nmSOC capacity is for Apple A7/A7X.
16nm FinFET 16nm just marketing.
Note the shocking story Intel 's mobile 22nm FinFET (equivalent to foundry 28) first product pushed to 2014.
2 years ago EEtimes-asia reported Intel accelerating Moore's law but just opposite resulted.
Now we know both Intel mobile 22 and 14 very late ( 1 year and counting).
Report is bulk FinFET has too much circuit variation and laptop and desktop manufacturing line regulator board voltage is at set on many parts in the register to larger 1V
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.