LONDON – The first multiproject wafer runs for customers testing Globalfoundries' 14-nm FinFET manufacturing process technology could start as soon as the first quarter of 2013, according to Mike Noonen, executive vice president of worldwide marketing and sales at the foundry chip maker.
Globalfoundries Inc. (Milpitas, Calif.) is pushing hard to get customers into volume production with chips on its14XM process in 2014, just one year after introducing a 20-nm process. In part it is trying to do this by reusing the middle and back-end processes from the 20-nm process while replacing planar transistors with FinFETs thereby making for an easier transition. A move from 20LPM to 14XM is expected to produce improved power and performance albeit at approximately the same die area.
Noonen said that 14XM mutiproject wafer (MPW) runs could take place in the first or second quarters of 2013 and would be used by early adopters of the process to run test circuits. Globalfoundries started offering early physical design kits for 14XM in September.
When asked if the 14XM process was still liable to receive tweaks as a process, or even to major changes such as the use of silicon-on-insulator (SOI) wafers as a starting point to improve manufacturability Noonen said: "14XM is a bulk process."
However, Noonen added that Globalfoundries does have experience in other process technologies that make use of SOI wafers. "We have additional strong alliances on fully-depleted SOI. We are the manufacturing partner for STMicroelectronics for FDSOI at 28-nm and 20-nm. We have aligned ourselves with the thought leaders in all the manufacturing processes."
FDSOI uses planar transistors but it could be that logical road-map for both process technologies merges at some point in the future. There has been discussion as to whether the use of SOI can reduce the variability of FinFETs and improve performance at 14-nm. Some think it can while others have cited potential problems with floating-body effects and self-heating.
Noonen said Globalfoundries is already able to run the full 20-nm manufacturing process flow at its recently completed Fab 8 in Malta, New York. Noonen declined to say whether Fab 8 was already running commercial, high volume production of 20-nm circuits for customers.
I agree. By calling 14XM is a hype. They should call it 20fin something like that. Finfet can't serve all the markets anyway and Intel is tweaking its own 22nm finfet to serve different segements of foundry market.
no one really cares what you cal it as long as it produces improved power and performance, although perhaps "hybrid" 20/14nm and ""hybrid"" 20/16nm etc might be a fair generic name to use everywhere now
but would using that generic name effect all the web sites adverting income ,probably so it wont happen.
talking about "The first multiproject wafer runs for customers"
hwho are these likely to be BTW, obviously the usual FPGA guy's, but how about XCore and Parallella guy's would they also happen to have some space on these first run's too.
do you happen to have a list of these lesser known companies somewhere that will use these run's ?
Bulk FinFET roll ?
I will wait for FinFET on SOI version Mr Noonen
It appears if I watch a moving on Surface Pro using Core i5 (22nm bulk FinFET) vs Surface RT (Arm 40LP)
~10 hour play time on Arm Surface vs 4 hours on a bulk FinFET Surface
Bulk FinFET even included advantage of die shrink to 22nm.
SOI needed for the power savings
We should probably rename Intel's 22nm finfet to 28nm as well then? If I recall the ARM ceo was pointing out Intel's 22nm had similar backend to the foundries 28nm node and a 26nm drawn gate dimension.
14XM PDK will be ready as early as Sep '13 (??), MPW in Q1 or Q2 '13 (??), 20nm process was ready but declined to comment commercial HVM running by Marketing&Sales EVP(??). Come on, It does not like normal practice with credit. Peter, you give hard time to Mr. Noonen to tell the truth(bluff).
We will see.
No happy ending until the parts are in the field. In my opinion the end customer rules, not the design or lab or prototype folks. I hope the foundry guys have the prototype parts in their phones or cars so they get the field message personally. Motorola used to put engine controller chips in VP cars, if I remember right.
But that was the "IDM" model, like Intel.
@peter.clarke -- interesting piece. Just to be clear, in fully-depleted technologies -- and this is true for SOI & bulk, FD-SOI & FinFET, there are NO floating body effects.
Also re: self-heating, IBM says this is way overblown -- it's an issue for both bulk & SOI. See Ed Nowak's (IBM) piece this week in ASN on Fin-on-Oxide (FinFETs on SOI) -- busts all those myths http://www.advancedsubstratenews.com/2012/11/ibm-why-fin-on-oxide-foxsoi-is-well-positioned-to-deliver-optimal-finfet-value/ .
In the meantime, looking forward to ST's results on 28nm FD-SOI at IEDM next week. These guys are really happy campers!
Wake me up 4 years after a 28nm chip ships from GF; that is when a normal cadence would ship 14nm. I have not seen any 28nm ship, must less 20nm.
I think Oil Daddy will be bailing em out for a while yet.
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