LONDON – Despite planning to sell or close ST-Ericsson, one of few users of its fully-depleted silicon on insulator (FDSOI) manufacturing process, STMicroelectronics has said intends to keep faith with the technology and continue manufacturing it at its wafer fab in Crolles, near Grenoble, France.
FDSOI would be one of three processes to be manufactured at Crolles, ST CEO Carlo Bozotti, told analysts on a conference call Monday (Dec. 10). The other two are CMOS with embedded non-volatile memory and CMOS for imaging sensors, Bozotti said.
STMicroelectronics NV (Geneva, Switzerland) told analysts on a conference call Monday (Dec. 10) that it intends to exit from its loss-making mobile digital chip joint-venture ST-Ericsson by the end of the third quarter 2013 but that it would continue to support ST-Ericsson with application processors, IP and manufacturing process technology during the disengagement. This will include the fully-depleted silicon-on-insulator (FD-SOI) process which ST has pioneered at 28-nm and with a road-map to 20-nm.
"Clearly we have the opportunity to move on with our FDSOI kind of technology, differentiated technology for low power applications in consumer products," Bozotti said on the call, adding: "It is only one of three pillars for Crolles."
The FDSOI process is claimed to have advantages for smartphone and tablet computer digital ICs in terms of the trade-offs between performance, power consumption and manufacturability. However, ST's primary customer for the FDSOI process at 28-nm and going to 20-nm, is the heavily loss-making ST-Ericsson. Most other companies are making use of planar bulk CMOS at 28-nm and 20-nm from foundries with plans to go to a FinFET-based manufacturing process at 16-nm. The world's largest chip company Intel has already introduced a FinFET-based manufacturing process at 22-nm.
The FDSOI manufacturing process technology has been selected by ST-Ericsson for its NovaThor mobile phone platform with 28-nm FDSOI prototyping in July 2012 and 20-nm FDSOI due to be ready for prototyping by 3Q13. In addition, ST has a licensing agreement with foundry Globalfoundries Inc. (Milpitas, Calif.) to be a FDSOI production and to open up the process to more customers.
When asked about manufacturing strategy as ST moves forward from the disposal of its holding in ST-Ericsson, Bozotti told analysts that ST would move on with FDSOI technology for low power in consumer products. Bozotti added that FDSOI was part of a three-legged manufacturing strategy for Crolles, all fundamental for the future of the company.
The first pillar is CMOS with non-volatile memory. Crolles is already manufacturing this process at 55-nm and would be moving to 40-nm, Bozotti said. He added that the process is good for general purpose, secure microcontrollers and automotive microcontrollers and that all production would move to 300-mm wafers and be responsible for about one-third of production at Crolles.
The second process is CMOS for imaging sensors – a part of ST's business that had been under a strategic review in 2010. At that time it had been decided to adopt a policy of application diversification and that this has been successful, Bozotti said. ST has multiple design wins in automotive and elsewhere, he added. The third manufacturing platform at Crolles would be FDSOI applied to digital consumer and ASIC products, Bozotti said.
And on Monday evening, ST announced silicon proof that FD-SOI gives them 30% higher speed and up to 50% improvement in power. IBS estimates that FD-SOI per-die cost will come in at about half of bulk planar or FinFET. Not bad!!