Ultimately, said Bohr, the distinction between regular processors and SoCs is blurring, with even CPUs like Ivy Bridge incorporating typical SoC elements like multiple computing cores, graphics, high performance IO circuits and cache. SoC,s however, are still taking those components to the extreme. “It’s a matter of degree,” Bohr said.
Indeed, Intel’s SoC is almost identical to its CPU version in terms of structure, including only some “minor tweaking” to provide either the lower leakage or higher volatage. It could even be described as a “superset” of the CPU version with expanded features.
The SoC and CPU versions share many of the same process features; the same transistor structure and pitch along with similar interconnect and fab process equipment. “These two technologies can be run side by side in the same factory,” said Bohr, noting that all the yield learning for Ivy Bridge had been translatable.
Bohr acknowledged that SoCs had presented Intel with new challenges. “When you talk about leakage, once you get down into the below 30 pico amp range, you have to deal with multiple sources of leakage, whether it’s through the gate oxide or leakage from source to drain or leakage from the drain to the substrate,” he said, adding that it had taken a lot of “tweaking an balancing” to finally get it right.
The turning point had finally been reached, he said, with the firm’s 32-nm Medfield SoC. “You’ll see some pretty impressive SoC products coming next year on the 22nm generation,” he said.
In terms of how Intel’s 22-nm SoC process stacks up against the 28-nm low power or forthcoming 20-nm processes from TSMC, Bohr claimed Intel had “far surpassed” the performance and low leakage capabilities of competitors. “We have a significant lead over our competitors,” he asserted.
Intel is also banking on he new technology process having a long tail. “We know that it’s scalable to 14-nm,” he said, concluding that tri-gate was not only a big power advantage for Intel’s CPUs, but for other low power SoCs.
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