SAN FRANCISCO -- Another 14-nm FinFET test chip has come to life, this time from Samsung, as
the ultra-deep submicron ecosystem gains momentum.
The Korean chip maker, leveraging a team including ARM,
Cadence, Mentor Graphics and Synopsys, announced Thursday (Dec. 20)
that it has taped out multiple test chips ranging from a full ARM Cortex A7
processor implementation (using the low-power component of the ARM's
"big-little" processor configuration/technology) to a SRAM-based
chip capable of operation near threshold voltage levels as well as
an array of analog IP.
Leveraging the emerging 14-nm ecosystem, Samsung:
Tapped Cadence to implement the Cortex-A7 processor test chip
in collaboration with ARM. Cadence delivered the
RTL-to-signoff flow, as well as chip-level integration and
verification. ARM used Cadence tools to develop the 14nm FinFET
Used Synopsys tools optimized for FinFET devices to implement
additional IP, including low-power SRAMs
Leveraged Mentor for 14nm FinFET challenges including
validation, manufacturing, and post-design production ramps.
The announcement was the second notable 14-nm FinFET achievement in a
Wow ! 14nm and FinFET. Seems like SoC processes from foundries are moving ahead faster than one would expect given all the physics challenges. Even if Samsung early risk production is at the end of 2013, the other guys better keep moving.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.