SuVolta Inc. (Los Gatos, Calif.) was founded as DSM Solutions Inc. in 2005 and originally planned to come to market with a novel form of junction FET. The company went through a reappraisal of its chances and then emerged with CTO Scott Thompson on-board in 2011 touting a fully-depleted planar transistor structure that uses doping to recreate what is done by others with silicon-on-insulator wafers.
Indeed it appeared that PowerShrink transistors with their deeply depleted channel could provide n alternative to FinFET and FD-SOI manufacturing processes, but none of the leading-edge IDMs or foundries appeared to be biting.
That was until Ajit Manocha, CEO of Globalfoundries Inc. (Milpitas, Calif.) said his company was evaluating a third manufacturing process option – besides FinFET and FD-SOI. That option he called super-steep retrograde well (SSRW), which is basically another name for what SuVolta has been doing.
It is not clear whether Globalfoundries is working with SuVolta or independently of them. But either way it helps give SuVolta's technology some credibility and is a good reason to keep an eye on SuVolta in 2013.
SuVolta's PowerShrink transistor manufacturing process achieves
FD-SOI-like benefits without requiring SOI wafers as the starting point.
It achieves some FinFET benefits with needing to make and protect fins.
But will the leading chip companies reject the technology because of
SuVolta's PowerShrink transistor is deeply-depleted
Globalfoundries mulls third manufacturing option
SuVolta reports 65nm parameter results at IEDM