Got DesignCon questions? Last week, I put forth five questions I'd like answered at the electronics industry's go-to conference covering all aspects of chip, board, and system design. Here are five more:
[Click here to register for DesignCon 2013, Jan. 28-31 at the Santa Clara Convention Center. Options range from an All-Access Pass to Free Expo Admission, which includes attendance at a dozen tech training sessions.]
When do we get to 440-Gbit/s Ethernet?
Later this year, a group of Ethernet experts will convene to start work on a next big step for this dominant network technology—a move to a 400 Gbit/s standard. To get there at all requires 28 Gbit/s serdes just now coming to market. To get there with some elegance will take signaling circuits that run faster than 40 Gbits/s, something that doesn’t exist today.
Can we get there? How and when? These are top questions to get perspective on at DesignCon. I hope to catch up with Adam Healy, a veteran SerDes expert with LSI Corp. Healy will present at a session about modulation schemes for just such products. He'll be followed by a talk from Altera on channel issues in the same beyond-25G territory.
In a related paper, IBM will talk about terahertz-class designs based on chain ganging multiple high speed serdes together for its top servers. It may not relate directly to 40G+ work, but I guarantee it will be interesting and the engineers there will have some thoughts on the topic.
I noticed your comments about materials so here are some thoughts: the industry is moving beyond just using conventional FR4. Most of the
change is geared toward the raw materials, like resin, glass fabrics and
copper, as well as a focus on hybrid constructions that utilize multiple
types of laminates in the same PCB. Spread glass is becoming popular again because of its more consistent rates of the signal speeds. We are also looking at material combinations that may function differently. Some layers of an interconnect may require high-speed materials, while other parts might only require FR4, or you may have a combination of materials on different layers. Another reason for the move to hybrid constructions is to lower costs, as high-speed laminates can reach 15x the cost of standard materials. Additionally, there is usually much more material used on a higher layer board. Another important change is the
move to lead free-assemblies in order to conform with international
standards for eco-friendly products. Dale Kersten, Vice President Operations, Global Engineering, Sanmina
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.