LONDON – STMicroelectronics is in discussions with Globalfoundries Inc. on a transfer of fully depleted silicon on insulator (FDSOI) manufacturing process technology for volume production in 2013, according to a senior executive at ST.
ST claims that at 28-nm, its FDSOI process can provide 30 percent more performance than bulk 28-nm CMOS at the same power consumption, or, alternatively, can provide as much as a 50 percent saving in dynamic power consumption at the same performance. This is because FDSOI allows the use of voltages down to 0.6-V whereas bulk CMOS only goes down to about 0.9-V, said Joel Hartmann, executive vice president of front-end manufacturing and process R&D, for the digital sector at ST.
ST has produced a technical video that outlines the technical advantages of the process (see below)
Multiple companies have been accessing a physical design kit for 28-nm FDSOI that has been made available through the SOI Consortium, Hartmann said. However, to commit to the process they want to be assured that manufacturing capacity will be in place when they need it, hence the need to press forward with Globalfoundries.
"We have an MoU [memorandum of understanding] with Globalfoundries. Right now we are discussing the details of the contract," said Hartmann. Globalfoundries signed up in principle in June 2012 to be a source of FDSOI chips both for ST and for other customers. For prototypes and initial volumes ST is already able to manufacture chips using the 28-nm FDSOI process at its pilot fab in Crolles, France.
Hartmann said Fab 1 in Dresden, Germany, would be a logical place for Globalfoundries' to host FDSOI as it is already the where the foundry manufactures 32/28-nm bulk CMOS. "If we start this month or in February Globalfoundries could be in production in the fourth quarter of 2013," said Hartmann.
Hartmann acknowledged that the raw wafer cost for a silicon-on-insulator wafer is about two to three times that of a standard silicon wafer. But the FDSOI manufacturing process is simpler, he said, which saves cost and improves yield. "FD-SOI process cost is 10 to 12 percent cheaper than bulk. This will allow us to fully compensate extra cost of SOI substrate when in high-volume manufacturing," said Hartmann.
ST subsidiary ST-Ericsson has announced a modem-application processor, the L8580, manufactured using 28-nm FDSOI, which will be available in sample quantities in 1Q13. A senior engineer at FPGA vendor Altera Corp. has evaluated FDSOI and concluded that the technology could have particular benefits for FPGAs. "Internally at ST we are also looking to use the process for consumer applications where power consumption is important," said Hartmann. Hartmann declined to disclose which products or product lines ST would be transferring to FDSOI manufacturing.
The video below has been produced by STMicroelectronics. It lasts about 8 minutes and provides a useful introduction to the FDSOI process and its features in comparison with bulk CMOS.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.