Breaking News
News & Analysis

3-D IC stacks pushed back to 2015

Update on 2.5-D and 3-D tests
4/2/2013 01:01 PM EDT
6 comments
NO RATINGS
< Previous Page 3 / 3
More Related Links
View Comments: Newest First | Oldest First | Threaded View
rick merritt
User Rank
Author
re: 3-D IC stacks pushed back to 2015
rick merritt   4/3/2013 6:12:38 PM
NO RATINGS
TI got out of the smartphone market http://www.eetimes.com/electronics-news/4397207/TI-steering-OMAP-toward-embedded I'm less sure about the ST/ST-Ericsson move but assume it was about that company's financial woes more than anything else. Meanwhile apparently most of the big SoC makers have decided they don't want 28 nm WideIO 1.0 memory at 12G but 20nm WideIO 2.0 at 24G.

resistion
User Rank
CEO
re: 3-D IC stacks pushed back to 2015
resistion   4/3/2013 1:21:00 PM
NO RATINGS
What's the reason for the double cancellations?

chipmonk0
User Rank
CEO
re: 3-D IC stacks pushed back to 2015
chipmonk0   4/3/2013 12:00:14 AM
NO RATINGS
re: Si interposers read my para 4

markhahn0
User Rank
Rookie
re: 3-D IC stacks pushed back to 2015
markhahn0   4/2/2013 10:51:52 PM
NO RATINGS
"rise above Moore's law"? I think not. the issue here is that numerous segments need 2.5d today, primarily because no one can afford the power and pins to drive enough memory. since this is a power-based argument, actual 3d stacking is mostly irrelevant: the need is many/wide pins from cpu to memory, and no cpu (except perhaps in a phone) can afford to be stacked, dissipation-wise. memory-wall, meet interposer. that's what's on the table. it's not a fab issue either - denser single chips don't eliminate the need for 2.5d integration - if anything, it gets worse.

chipmonk0
User Rank
CEO
re: 3-D IC stacks pushed back to 2015
chipmonk0   4/2/2013 6:37:45 PM
NO RATINGS
@RICK : a refreshingly honest report on the status of 3-D stacking / 2.5 D modules that exposes the reality of this overly mechanical attempt to rise above Moore's Law or circumvent a bank balance too lean to afford a 14 nm Fab. Though the partisans of 3-D stacking have for quite a few years now been drooling about the bonanza of the billion units a year Smart Phone industry adopting their technology "any time now", given the laws of physics & economics thats probably one of the last application that would ever happen. Per historical precedence the normal order of adoption for this complex process would be : military, medical, supercomputers, servers, graphics-heavy consumer systems like game systems and perhaps only then Tablets and Smart phones. And even after all the hardware mfg. issues of 3-d stacks are solved, the architecture and programing issues of hooking up the right chunk of memory to a specific processor core in zillion - core processors would remain just as much a challenge as in any other parallel computer. 2.5 - d modules with Si interposers would provide good enough interconnect density and thus significant improvement in Bandwidth / Power eff. but these Interposers need to be much cheaper than just by 50 % ( Glo Fo target ? ) to prevent the time - tested strategy to integrate the whole shebang on a single chip. Regarding 2.5-d modules with cheaper organic substrates, the improvement in bandwidth will be severely restricted by interconnect density possible even at future geometries ( 8 um L&S, 30 um dia via ) or no. of layers ( cost ). RC delay and signal skew in resulting long lines between chips would be significant. So not much of a improvement in Bandwidth or power efficiency there. Elegant electrical methods to work around architectural and physical limits of package level integration are in development and would very likely precede the complex TSV based 2.5 or 3-D processes.

kjdsfkjdshfkdshfvc
User Rank
Rookie
re: 3-D IC stacks pushed back to 2015
kjdsfkjdshfkdshfvc   4/2/2013 2:11:26 PM
NO RATINGS
They'll be worth the wait. http://bit.ly/IC4m9t

August Cartoon Caption Winner!
August Cartoon Caption Winner!
"All the King's horses and all the KIng's men gave up on Humpty, so they handed the problem off to Engineering."
5 comments
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll
Radio
LATEST ARCHIVED BROADCAST
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.