An out-of-order execution engine to enable best-in-class, single-threaded performance.
multi-core and system fabric architecture scalable up to eight cores
and enabling greater performance for higher bandwidth, lower latency and
more efficient out-of-order support for a more balanced and responsive
New Intel Architecture instructions and technologies
bringing enhanced performance, virtualization and security management
capabilities to support a wide range of products.
management capabilities including a new intelligent burst technology,
low- power C states and a wider dynamic range of operation taking
advantage of Intel's 3-D transistors.
The Silvermont-based Bay
Trail SoC, scheduled to be in tablets on the market during the 2013
holiday season, will offer more than double the compute performance of
Intel's current Atom tablet offering, Intel said. Variants of the Bay
Trail platform will also be used in market segments including entry
laptop and desktop computers in innovative form factors, Intel said.
Merrifield SoC—aimed at high-end smartphones and scheduled to ship to
by the end of this year—will enable increased performance and battery
life over current-generation products, Intel said. Merrifield brings
support for context aware and personal services, ultra-fast connections
for Web streaming, and increased data, device and privacy protection,
the company said.
The Avoton SoC—the 22-nm successor to Intel's
Centerton server SoC—will enable improved energy efficiency and
performance-per-watt for microsevers, Intel said. Another
Silvermont-based SoC, Rangeley, is aimed at network and communication
infrastructure, specifically for entry-level to mid-range routers,
switches and security appliances, Intel said. Both products are
scheduled for the second half of this year, Intel said.
also concurrently delivering advancements on its next-generation, 22-nm
Haswell microarchitecture for its Core processors to enable full-PC
performance at lower power levels and new form factors, Intel said. The
company said it plans to refresh its Xeon line of server and embedded
processors on 22-nm technology, offering better performance-per-watt.
taking advantage of both the Silvermont and Haswell microarchitectures,
Intel is well positioned to enable great products and experiences
across the full spectrum of computing," Perlmutter said.
I am not guessing.
Silvermount has ivy bridge graphics... (Big Si area) ...and Atom core with out of order execution ( significantly bloats x86 core size.)
We have look at this for smartphone application....I am telling you with certainty that silvermount is NOT going to ship in smartphones at any volume due to cost.
This is simple Intel marketing at it's finest....marketing leadership performance but using a lot of silicon area so its not apples to apples benchmarking
He has a point though, even the current Atom has a much larger die size than its competitors:
This is why there are 4, 5 and even 8-core ARMs but only dual Atoms.
Considering this subsidy example further Ivy E3 at 26/22 nm RISK production cost is approximately $0.53 mm2 on average marginal cost of $88, average marginal revenue $196, average weighed Price $279 (range $189 to $884). So some E3v2’s earn a much higher margin then ATOM does today.
In this example the average marginal cost of producing one additional E3v2 redirected to ATOM now delivers five 62 mm2 devices at fabrication cost of $15.95 each that is $0.26 mm2 at run end. If those 5 processors fetch $55.50 each can deliver the equivalent of one E3’s average margin in this $197 marginal revenue displacement.
The key question then is Intel’s variable cost of production, the general administrative and manpower charge to produce a single microprocessor, or in this general example the system component solution, which on Intel’s financial is around $105. Here raises the price below variable cost query.
Mike Bruzzone, Camp Marketing
Financial info like this from Bruzzer is too complex for me. But I do believe the issue is not about performance but cost. As mentioned before:
Ask Intel the die size. Intel typically has to be one generation ahead to have same die size. very expensive
Ask Intel about margins.... actually you can deduce them from the 10Q for the group that runs Atom.
If these numbers have anything to do with reality then they are confidential information. Hence, either this is all guess BS, or you are violating your NDA with Intel (which they do not look at kindly, and rightfully so). My guess is that you know nothing and made up these numbers.
You know, Intel has been in the chip business for 40+ years, so one must assume that they understand basics like die size, die cost, gross margin, etc. If I was ARM or TSMC I would be very worried. Intel (not unlike the US) is slow, and certainly does not do the right thing many times, but when it starts moving you better get out of the way.