Tunç Doluca: We’re working on the next node, probably in the 90nm range. The process development is internal, but we will partner for capacity.
Foundry partners for the process will most likely be someone different [from current partners lead by 300mm wafer supplier Powerchip that makes about a third of Maxim’s products]. Part of our strategy is to build chips on 300mm wafers because the parts are used in mobile products, and they need the high capacity and low cost structure of 300mm wafers.
The new process has new requirements, so you have to see who has the right fab to build it. We want to leverage what others have. With chip capacity from our current foundry partners, we already could do $4 billion in sales and we are at $2.5 billion in revenue, so we have room.
The new process will support high voltage designs and far denser digital designs. It’s still a bipolar CMOS/DMOS technology, but with finer geometry and some new things on the analog front.
MEMS manufacturing is still a separate process resulting in a component integrated at the package, not the die level.
We probably will ship the first parts designed in the new process next year. We are designing in it right now, but it will take time to qualify the process.
EE Times: Who else is working on sub-100nm analog processes?
Doluca: I imagine the suppliers focused on mobility are probably working on it but everyone is very secretive. So we don’t know exactly but I imagine TI and Qualcomm and Dialog. We keep our technology development close to the chest, too, because it’s a differentiator.
Tunç Doluca with a framed 300mm wafer in his office.