SAN JOSE, Calif. – Altera Corp. will sample next year midrange and high-end FPGAs based on TSMC 20nm and Intel 14nm technology, respectively. The company announced its Arria 10 product for the 20nm process and sketched out capabilities its expects for a Stratix 10 generation using the Intel process.
The 14nm chips will pack up to four million logic elements running at up to a GHz or faster. They will handle up to 10 TeraFlops of DSP performance and embed next-generation 56 Gbits/s serdes or up to 16 28G transceiver channels, Altera said.
The new Arria 10 line made in TSMC’s 20nm process will pack dual-core ARM Cortex A9s running up to 1.5 GHz, about twice as fast as today’s chips. Altera would not disclose what embedded processors it plans for the Stratix 10.
Multiple companies are using an early version of Quartus II software to develop Arria 10 chips now. Designs include a 100G wired processor supporting 17.4G backplanes, a wireless basestation processor and a search algorithm chip supporting 16 20G transceivers and DDR4 memory.
Altera expects production versions of its design software and first samples of its 20 and 14nm chips both will ship early next year. Initial test versions of the 14nm parts could emerge this year given Intel has announced it will be in production with its 14nm process in 2013.
“This is a new experience for Altera,” said Chris Balough, senior director of SoC product marketing at Altera. “Generally we have been way out front co-exploring a foundry process with a partner,” he said.
Altera does not have a deal for exclusive access to the Intel 14nm process. Thus its smaller competitors Achronix and Tablua, also working with Intel, could ship 14nm parts at the same time.
Chips made in 20nm and finer processes are expected to carry an unknown price premium. That’s because they will need two passes through lithography systems for some critical layers.
In addition, analysts speculate the cost of Intel’s foundry service could be higher than that of other foundries. Altera would not comment on any price premiums it expects for its chips.
With the generation 10 chips, Altera said it will support 56G serdes, 3-D chip stacks and new analog capabilities such as high frequency switching from its Enpirion acquisition. However it did not detail exactly what capabilities it will support or when they will be offered.
Would 3-D stacking of chips be really necessary for Altera at 14 nm from Intel - unless they decide to put SERDES on separate chips ? In that case who would stick / stack them together ? Intel / OSATs ?
They are not saying.
Xilinx has been more vocal on this front
Although Huawei did talk about what it is doing with Altera
There was no processor mentioned for the 14nm part. Is that an SOC or plain vanilla FPGA? What happened to their current generation of products? It would be interesting to see how the 20nm part got its performance boost compared to the current gen SOC. I think their current gen ARM is ~1GHz and they claim 1.5GHz for the 20nm part. You have to do some custom layout to get 50% gain.
I think Altera has put themselves into a really good position recently in terms of future hardware and their existing software.
A lot of people are interested in these new parts despite the costs. It is much easier to design and implement a board with one fpga than to have to use multiple fpgas.
Altera's main competitor is Xilinx, not these other companies. Altera using Intel fabs is a big deal.
Altera talked about 2X performance gain or 70% lower power at same performance (vs 28nm). If true, sounds like they use Intel's uPC process for max performance boost. Won't be surprised finding Intel processor embedded later.