PORTLAND, Ore.--Intel's Xeon Phi is not only powering the world's fastest supercomputer—China's MilkyWay-2—but is also diversifying with versions that allow many more computer users to take advantage of massively parallel supercomputing. Intel's three new Xeon Phi models available today—plus the promise of the world's first 14-nanometer high-performance computer (HPC) central-processing unit (CPU) next year—aim to bring supercomputing-style big-data analytics to every caliber of user.
"The new frontier in supercomputing is 'big data'—turning streams of realtime data into knowledge with HPCs," said Raj Hazra, vice president of the Intel Architecture Group and general manager of Intel's Technical Computing Group. "Big data is no longer just a possibility, but an inevitability moving forward."
According to IDC, worldwide technical computing server revenue is $11 billion today, growing to $15 billion by 2017. HPC is no longer just solving military and environmental problems at national labs, but is opening up whole new areas of research, such as the $1.3 billion Human Brain Project and the similar Obama "Grand Challenge"—the $100 million U.S. Brain Initiative. But beyond these government-backed mega-initiatives, HPCs are also pushing down into widespread modeling applications that allow simulators to substitute for physical models in industry, business and the enterprise. Intel's aim is nothing less than to expand supercomputing from government and defense applications to industry and enterprise applications—giving every x86 user a clear path to supercomputing, beginning with three new models.
The Xeon Phi is not available in three new models, the 7100 high-end model with 16-Gbytes of memory and 320 Gbits per second bandwidth, the tiny 5100 single-board-computer version with 8-Gbytes of memory and 300 Gbits per second bandwidth, and the inexpensive 3100 model with 6-Gbytes of memory and 240 Gbits per second bandwidth, meant to be affordable by anyone with a Xeon-based workstation. The 7100 and 3100 have been expected from Intel, with many leaks on the Internet revealing their stock-keeping units (SKU), but the tiny form factor of the 5100 took most by surprise. The first member of that family—the 5120D—is already being used by original equipment manufacturers (OEMs) to create a new genre of computer—the embedded supercomputer.
Intel announced that it will integrate a 100-Gbit per second interconnection fabric right on the die of future Xeon Phi CPUs.
"The Xeon Phi high-density 5100 form factor expresses our belief that the HPC eco system has a lot of innovation to put into their systems," said Hazra. "We believe its very small form-factor will lets OEMs add their own innovations on top to customize it for the needs of their end-users. In fact, OEMs are already using the 5120D for high-density designs enabling a new level of performance density that has not been possible before now."
Another surprise was Intel's announcement that a standalone CPU, rather than coprocessor, version of the Xeon Phi—codenamed "Knight's Landing"—will be available next year, long before Intel's competitors will be shipping 14-nanometer chips.
"Intel will be shipping 14-nanometer chips before anybody else in the world," said Hazra. "Our next-generation Xeon Phi on Intel's 14 nanometer process technology will no longer just be a PCI Express co-processor, but can also act a standalone CPU, unbound by the need for offloading and with other innovations such as integrated on-package memory matched with the open-source Lustre distributed file system."
For the future, Hazra promised that Xeon Phi models would include an integrated interconnection fabric right on the processor die. By integrating 100-gigabit per second communications lines onto CPUs, distributed cluster supercomputers can be drastically downsized. In the foreseeable future, that will lead to petascale supercomputers that fit in single rack and exascale supercomputers that consume just 20-megaWatts, according to Hazra.
Hi Colin - just wanted to point out a needed minor correction to your above article. In particular, in the first line of the fourth paragraph the following one letter change should be made:
The Xeon Phi is not (should be noW -- "w" rather than "t")available in three new models, the 7100 high-end model with 16-Gbytes of memory and 320 Gbits per second bandwidth .........
I was looking for the cost of these processors or at least the predicted cost but could not find any reference to the price point that the budget supercomputers had? Given the title of the article I was expecting some market costing numbers or a comparison to existing system/chip costs. I am happy to see the new line announcement and look forward to it rolling out but am still wondering if these will be budget supercomputers or just the next generation supercomputer cores.