MANHASSET, NY -- Researchers from Taiwan’s National Nano Device Laboratories will detail at the upcoming IEDM an environmentally sensitive solar cell manufacturing process that may be compatible with CMOS processing.
Paper 36.5 entitled "Bifacial CIGS (11% Efficiency)/Si Solar Cells By Cd-Free And Sodium-Free Green Process Integrated With CIGS TFTs" describes the process used to build a two-sided solar cell integrated with thin-film transistors (TFTs).
The researchers claim that the process is a step toward self-powered chips.
One side has a solar cell made from CIGS (CuInGaSe2), as well as TFTs also made from CIGS. Both devices are integrated on the back of a silicon-based solar cell.
The integrated TFTs achieved record performance for CIGS technology,
demonstrating a hole mobility of 0.22 cm2/V. The relatively
low-temperature and sodium-free manufacturing process used here
(400-500°C) could mean this CIGS-fabrication technique may be compatible
with CMOS processing, claim the researchers.
The unique manufacturing process avoids the use of environmentally harmful cadmium, as well as sodium typically found in CIGS solar-cells, but at the expense of cell efficiency. To compensate, the CIGS layer was deposited on a textured surface, bringing the CIGS cell conversion efficiency up to 11 percent.
The researchers plan to show at their talk images of a hybrid uniform 6” CIGS solar cell integrated with TFTs on the same silicon solar cell substrate.
Session 36 will also feature a paper by IBM researchers who will report on heterojunction solar cells with record conversion efficiency of 20.7 percent on p-type crystalline silicon substrates, using plasma-enhanced chemical vapor deposition (PEVCD) contact layers deposited at below 200deg.C.
The researchers claim their achievement is the first demonstration of high-efficiency (>20%) heterojunction solar cells with low-cost aluminum-doped zinc oxide electrodes, instead of indium tin oxides, on either n or p-type silicon.
IEDM alternates every year between San Francisco and Washington D.C. and will be held at Hiltom Washington, December 5-7.
The problem with Solyndra wasn't only trying to scale up CIGS to mass fabrication (apparently hard to do) but also their insistence of doing it inside glass tubes (apparently much harder). All other CIGS companies have planar designs and as do this one. That's more promising as I see it.
Although I don't see the point of this project. Solar cells have to be cheap and I don't see how a CMOS compatible many step, large area, process will ever be. Seems like a better idea to just take a standard chip and power it with a standard solar cell than doing this, from a cost perspective.
Although, it's a research paper so I guess the point is to show more what's techically possible than what makes sense. (With the disclaimer that I haven't read the paper myself more than the summary above!)