MANHASSET, NY -- Three papers to be delivered at IEDM to be held in Washington D.C in December will detail performance records achieved by compound semiconductor researchers.
As reported earlier, an Intel-led team will unveil tri-gate FinFET-type quantum-well InGaAs MOSFETs with 30-nm gates that deliver the best electrostatic performance of any III-V MOSFET.
In addition, a team from Teledyne, in cooperation with researchers at MIT, will unveil the record settings in high-electron-mobility transistors (HEMTs). The researchers fabricated enhancement-mode, 40-nm InGaAs metamorphic-HEMTs on GaAs substrates, and demonstrated a transconductance of more than 2.7 mS/µm. The devices achieved a record cutoff frequency (ft ) of 688 GHz, the highest ever reported from any FET in any material system, according to Teledyne researchers.
And a team led by HRL Laboratories/UC-San Diego also will report record performance from HEMT devices, but from an ultra-short gate length gallium nitride (GaN) version.
It is known that among compound semiconductors, GaN is unique in its ability to support both high current densities and high breakdown voltages. As shown by the team at HRL, it also offers excellent high-frequency performance.
The researchers built ultra-small 20-nm gate-length AlN/GaN/AlGaN double-heterostructure HEMTs on 3-inch silicon-carbide substrates, resulting in a GaN HEMT record ft of 310 GHz with a simultaneous fmax of 364 GHz. The team achieved these results through aggressive gate length and source-drain scaling, a novel self-aligned gate technology, vertical epitaxial scaling and parasitic resistance reduction. The devices were highly uniform across the wafer and demonstrated a breakdown voltage of 9 V.
Evening compound session Complementing the record-reporting papers is an evening panel that will address the question whether silicon carbide (SiC) or GaN can replace silicon as the semiconductor for power devices.
Organized by Paul Chow, professor of Electrical, Computer, and Systems Engineering at Rensselaer Polytechnic Institute, the panel will discuss the tradeoffs between the two technologies as they apply to power semiconductors.
Discrete SiC and, more recently, GaN power devices have been commercialized with lower power loss and wider range of operating conditions than the corresponding silicon devices. Device costs are still substantially higher and long-term reliability is still questionable.
One objective of the panel is to consider whether discrete SiC or GaN power devices can be manufactured in silicon foundries to allow maximum rate of cost reduction and hence broaden system applications. The ultimate goal of monolithic integration of power, mixed-signal, rf and photonic devices and circuits using SiC or GaN devices side-by-side with silicon devices will also be discussed.
Panelists include Michael Breiere, formerly executive at International Rectifier and president of his consulting firm ACOO Ltd.; Peter Frederichs, Managing Director at SiCED, a joint venture between Siemens and Infineon; Dan Kinzer, chief technology officer and senior vice president, Technology at Fairchild Semiconductor; Umesh Mishra, professor at Electrical & Computer Engineering Department Engineering and Sciences, University of California, Santa Barbara; and John Palmour, co-Founder of Cree Inc. and Cree's Chief Technology Officer of Advanced Devices.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.