Competitors are naturally the most skeptical of all.
Archrival Synopsys essentially welcomed Cadence as a latecomer to the IP market. Synopsys doesn’t break out its IP revenues. However, the company said over the last 12 months it made $459 million, or roughly 25 percent of its total revenue in the broad systems/IP area.
“We’re the second largest IP vendor with approximately 1,400 IP engineers worldwide,” Synopsys CEO Aart de Geus said in a recent conference call. “After 15 years of investment, our DesignWare IP is shipped in more than a billion chips per year,” he added.
From Ceva's perspective, “we believe premium processor IP, like that from ARM and Ceva, is best suited to be offered by independent suppliers,” said Eran Briman, vice president of marketing at Ceva. “We can guarantee customers a specific road map and innovation path, something that only an independent IP vendor can commit to,” he said.
Ceva claims it pumps 40 percent of its revenues back into R&D, something a larger EDA company would not likely do. What’s more the DSP core business “is completely different than the EDA IP business,” Briman said, requiring “specialization in DSP algorithms, software, programming languages, development tools and more.”
He characterized Telsilica’s technology as “essentially an EDA tool that adds programmability to hardware blocks, a DIY approach with automatic generation of tools and RTL.”
Briman also suggested Cadence could handicap users who want Tensilica cores but not Cadence tools. “Ceva has a long track record of maintaining design tool neutrality and allowing customers to work with our DSP solutions regardless of their design environment,” he said.
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