If the process is the same, the reduced die size must come from fewer circuits. Alas, we had to wait for a de-layered die photo to shed some light on what was cut from the A5_2 to arrive at the A5_3. Moving forward a day, we did indeed get the die photo and Chipworks updated their posting. We reproduce the die photos of the A5_2 and A5_3 here. Annotations were added to facilitate the upcoming discussion and the photos enlarged so you can easily see the features (blocks). As a side note, it is interesting that two current products use different versions of the A5. I hope they don't mix up the bins.
Click on image to enlarge.
A5_2 die (photo are not to scale).
Click on image to enlarge.
A5_3 die (photo are not to scale). Don't mix up the bins.
The CPUs of both die are annotated with dark green boxes. In the case of the A5_2, a dashed line is used. Chipworks indicated that only a single CPU core is used on the A5_3. There is, however, a difference in the amount of cache for the A5_3. A similar block of cache, with four quadrants, is outlined in light green on both images. The A5_3 has 16 of these blocks while the A5_2 appears to have 32. So we have cut half of this cache within one core.
The GPU of the two die have also been annotated. In their published A5_3 die photo, Chipworks identified a single block (dark green) as the GPU. It is believed the GPU is actually represented by four blocks, which have been annotated with the yellow dashed lines. This set of four blocks agrees with one half of the eight blocks that are annotated on the A5_2. This assumption puts the GPU area of the A5_2 in the same ballpark as that originally calculated for the 2011 A5. At the end of the day, apparently more than just the CPU got a haircut.
Beyond the two "PUs," there appear to be nine digital blocks for the A5_3, down from the 12 of the A5_2. As pointed out by Chipworks, a bunch of things happened on the analog side. The one change that jumps out is the addition of a second USB block. The A5_2 and the A4 both have a single USB block, so this is a distinct addition to the A5_3. These blocks are annotated with red dashed lines on both images. Finally, both parts have six PLLs, annotated with purple dashed lines.
Also on the analog side was a quick comment Chipworks made about the process. Yes, they confirmed the process geometry was 32 nm, but they also commented:
"We now think that this part uses a mixed-signal version of the 32-nm process that allows extra passive components such as resistors, capacitors, and inductors, that is much more suited to analog circuitry."
The process geometry, therefore, remains the same, but it appears the A5_3 is fabbed in a more analog-tailored process. This is an important point with impact beyond the reduction in the number of circuits. Otherwise there just seems to be more area devoted to analog circuits. We will come back to this later.
Good points about cost reduction for the older gen products that Apple still sells.
The additional USB and the more costly process for better analog support, however, clearly point to a future Apple device. Whether that is the iWatch or something else, we shall have to wait and see.
"This is the big question. Why go through all the work of this redesign, including the move to a separate DRAM package? The Apple TV is just a hobby. No? Two hypotheses have emerged. The first one centers around economics."
Its not just the Apple TV. The new ipod touch also uses A5, which still sells in millions. They still sell the iPhone 4,iPad 2, ipad mini which all uses the A5 chip. The die size reduction thus might make sense for them. In addition, they are rumored to release iwatch/iphone lite etc which could also use A5.